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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2014-12-09 18:26:04 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2014-12-09 18:26:04 +0000 |
| commit | cee66c6853813ee9d10acaec6b4bb3084262263f (patch) | |
| tree | d738268619ee7aa0b1f19a2b82e650a7c95f5dcf | |
| parent | 3759108f07fed59b39110d864e43e7ca5df2e6ad (diff) | |
| download | gcc-cee66c6853813ee9d10acaec6b4bb3084262263f.zip gcc-cee66c6853813ee9d10acaec6b4bb3084262263f.tar.gz gcc-cee66c6853813ee9d10acaec6b4bb3084262263f.tar.bz2 | |
[AArch64] Add TARGET_SCHED_REASSOCIATION_WIDTH
2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com>
* gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation
tuning parameters.
* gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH):
Define.
(aarch64_reassociation_width): New function.
(generic_tunings): Add reassociation tuning parameters.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(thunderx_tunings): Likewise.
From-SVN: r218526
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-protos.h | 3 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 36 |
3 files changed, 47 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e680ae9..f6bc21c6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com> + + * gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation + tuning parameters. + * gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH): + Define. + (aarch64_reassociation_width): New function. + (generic_tunings): Add reassociation tuning parameters. + (cortexa53_tunings): Likewise. + (cortexa57_tunings): Likewise. + (thunderx_tunings): Likewise. + 2014-12-09 Andrew Pinski apinski@cavium.com Kyrylo Tkachov kyrylo.tkachov@arm.com diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index ec4157a..2a7c30f 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -171,6 +171,9 @@ struct tune_params const int memmov_cost; const int issue_rate; const unsigned int fuseable_ops; + const int int_reassoc_width; + const int fp_reassoc_width; + const int vec_reassoc_width; }; HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 03f3ac4..f2d390b 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -323,7 +323,10 @@ static const struct tune_params generic_tunings = &generic_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 2), - NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING) + NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING), + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1 /* vec_reassoc_width. */ }; static const struct tune_params cortexa53_tunings = @@ -335,7 +338,10 @@ static const struct tune_params cortexa53_tunings = NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 2), NAMED_PARAM (fuseable_ops, (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD - | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR)) + | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR)), + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1 /* vec_reassoc_width. */ }; static const struct tune_params cortexa57_tunings = @@ -346,7 +352,10 @@ static const struct tune_params cortexa57_tunings = &cortexa57_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 3), - NAMED_PARAM (fuseable_ops, (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK)) + NAMED_PARAM (fuseable_ops, (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK)), + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1 /* vec_reassoc_width. */ }; static const struct tune_params thunderx_tunings = @@ -357,7 +366,10 @@ static const struct tune_params thunderx_tunings = &generic_vector_cost, NAMED_PARAM (memmov_cost, 6), NAMED_PARAM (issue_rate, 2), - NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH) + NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH), + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1 /* vec_reassoc_width. */ }; /* A processor implementing AArch64. */ @@ -450,6 +462,19 @@ static const char * const aarch64_condition_codes[] = "hi", "ls", "ge", "lt", "gt", "le", "al", "nv" }; +static int +aarch64_reassociation_width (unsigned opc ATTRIBUTE_UNUSED, + enum machine_mode mode) +{ + if (VECTOR_MODE_P (mode)) + return aarch64_tune_params->vec_reassoc_width; + if (INTEGRAL_MODE_P (mode)) + return aarch64_tune_params->int_reassoc_width; + if (FLOAT_MODE_P (mode)) + return aarch64_tune_params->fp_reassoc_width; + return 1; +} + /* Provide a mapping from gcc register numbers to dwarf register numbers. */ unsigned aarch64_dbx_register_number (unsigned regno) @@ -11023,6 +11048,9 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load, #undef TARGET_PREFERRED_RELOAD_CLASS #define TARGET_PREFERRED_RELOAD_CLASS aarch64_preferred_reload_class +#undef TARGET_SCHED_REASSOCIATION_WIDTH +#define TARGET_SCHED_REASSOCIATION_WIDTH aarch64_reassociation_width + #undef TARGET_SECONDARY_RELOAD #define TARGET_SECONDARY_RELOAD aarch64_secondary_reload |