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authorAndrea Corallo <andrea.corallo@arm.com>2022-11-16 14:28:00 +0100
committerAndrea Corallo <andrea.corallo@arm.com>2022-11-28 10:09:21 +0100
commitce9dd996b9de7727e092769055931f07bc6f4e5c (patch)
tree9ac0578ac2289c550d22c83240ea6ace8496b02a
parentd63992a20ae196be73acc0098a957b6e11dbca53 (diff)
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arm: improve tests for viwdupq*
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests. * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c36
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c36
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c36
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c50
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c50
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c50
18 files changed, 658 insertions, 106 deletions
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
index 0f999cc..67a2465 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_n_u16 (inactive, a, b, 2, p);
+ return viwdupq_m_n_u16 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 2, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
index f79c91e..9fc2518 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_n_u32 (inactive, a, b, 4, p);
+ return viwdupq_m_n_u32 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 4, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
index c0fee9f..39f4071 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_n_u8 (inactive, a, b, 8, p);
+ return viwdupq_m_n_u8 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 8, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
index 468ba17..8bb680e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_wb_u16 (inactive, a, b, 2, p);
+ return viwdupq_m_wb_u16 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 2, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
index e919030..2dc8d5f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_wb_u32 (inactive, a, b, 4, p);
+ return viwdupq_m_wb_u32 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 4, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
index 309ce95..ff3a5f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m_wb_u8 (inactive, a, b, 8, p);
+ return viwdupq_m_wb_u8 (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_m (inactive, a, b, 8, p);
+ return viwdupq_m (inactive, a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, mve_pred16_t p)
+{
+ return viwdupq_m (inactive, 1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
index 599d907..5f37290 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint32_t a, uint32_t b)
{
- return viwdupq_n_u16 (a, b, 2);
+ return viwdupq_n_u16 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u16" } } */
+/*
+**foo1:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint32_t a, uint32_t b)
{
- return viwdupq_u16 (a, b, 2);
+ return viwdupq_u16 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u16" } } */
+/*
+**foo2:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 ()
+{
+ return viwdupq_u16 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
index 7c2af74..de93f8a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32_t a, uint32_t b)
{
- return viwdupq_n_u32 (a, b, 4);
+ return viwdupq_n_u32 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u32" } } */
+/*
+**foo1:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32_t a, uint32_t b)
{
- return viwdupq_u32 (a, b, 4);
+ return viwdupq_u32 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u32" } } */
+/*
+**foo2:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 ()
+{
+ return viwdupq_u32 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
index 4ff6079..089025c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint32_t a, uint32_t b)
{
return viwdupq_n_u8 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u8" } } */
+/*
+**foo1:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint32_t a, uint32_t b)
{
return viwdupq_u8 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u8" } } */
+/*
+**foo2:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 ()
+{
+ return viwdupq_u8 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
index 1e5ce88d..fc3e9c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint32_t * a, uint32_t b)
+foo (uint32_t *a, uint32_t b)
{
- return viwdupq_wb_u16 (a, b, 4);
+ return viwdupq_wb_u16 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u16" } } */
+/*
+**foo1:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint32_t * a, uint32_t b)
+foo1 (uint32_t *a, uint32_t b)
{
- return viwdupq_u16 (a, b, 4);
+ return viwdupq_u16 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u16" } } */
+/*
+**foo2:
+** ...
+** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 ()
+{
+ return viwdupq_u16 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
index 0c076f7..4c098dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t * a, uint32_t b)
+foo (uint32_t *a, uint32_t b)
{
- return viwdupq_wb_u32 (a, b, 8);
+ return viwdupq_wb_u32 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u32" } } */
+/*
+**foo1:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t * a, uint32_t b)
+foo1 (uint32_t *a, uint32_t b)
{
- return viwdupq_u32 (a, b, 8);
+ return viwdupq_u32 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u32" } } */
+/*
+**foo2:
+** ...
+** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 ()
+{
+ return viwdupq_u32 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
index 9e5118b..44cb53f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint32_t * a, uint32_t b)
+foo (uint32_t *a, uint32_t b)
{
- return viwdupq_wb_u8 (a, b, 2);
+ return viwdupq_wb_u8 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u8" } } */
+/*
+**foo1:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint32_t * a, uint32_t b)
+foo1 (uint32_t *a, uint32_t b)
{
- return viwdupq_u8 (a, b, 2);
+ return viwdupq_u8 (a, b, 1);
}
-/* { dg-final { scan-assembler "viwdup.u8" } } */
+/*
+**foo2:
+** ...
+** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 ()
+{
+ return viwdupq_u8 (1, 1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
index fdaf6be..2242877 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_n_u16 (a, b, 2, p);
+ return viwdupq_x_n_u16 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u16 (a, b, 2, p);
+ return viwdupq_x_u16 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u16 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
index affc616..4b2b650 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_n_u32 (a, b, 4, p);
+ return viwdupq_x_n_u32 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u32 (a, b, 4, p);
+ return viwdupq_x_u32 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u32 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
index 8137c62..873952b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_n_u8 (a, b, 8, p);
+ return viwdupq_x_n_u8 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u8 (a, b, 8, p);
+ return viwdupq_x_u8 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u8 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
index d7aa141..b6c9479 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_wb_u16 (a, b, 8, p);
+ return viwdupq_x_wb_u16 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u16 (a, b, 8, p);
+ return viwdupq_x_u16 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u16 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
index 7fe5696..5fd8496 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_wb_u32 (a, b, 2, p);
+ return viwdupq_x_wb_u32 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u32 (a, b, 2, p);
+ return viwdupq_x_u32 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u32 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
index 8e3ecef..abbb40f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_wb_u8 (a, b, 4, p);
+ return viwdupq_x_wb_u8 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
+foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
{
- return viwdupq_x_u8 (a, b, 4, p);
+ return viwdupq_x_u8 (a, b, 1, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "viwdupt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (mve_pred16_t p)
+{
+ return viwdupq_x_u8 (1, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file