diff options
| author | Jeff Law <law@gcc.gnu.org> | 1996-05-21 21:50:11 -0600 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1996-05-21 21:50:11 -0600 |
| commit | cca19830cae82e147d69cfbf06ac9cdea0890495 (patch) | |
| tree | 0a83d71b03924ff4dca17281368b6b29ccf355d5 | |
| parent | 71032fe3c4c7b0f9c4820d46d226f1b587025035 (diff) | |
| download | gcc-cca19830cae82e147d69cfbf06ac9cdea0890495.zip gcc-cca19830cae82e147d69cfbf06ac9cdea0890495.tar.gz gcc-cca19830cae82e147d69cfbf06ac9cdea0890495.tar.bz2 | |
h8300.md (div patterns): Rewrite.
* h8300/h8300.md (div patterns): Rewrite.
(mod patterns): Likewise.
From-SVN: r12072
| -rw-r--r-- | gcc/config/h8300/h8300.md | 48 |
1 files changed, 32 insertions, 16 deletions
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index f714b84..ae32c1e 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -842,8 +842,10 @@ (define_insn "udivqi3" [(set (match_operand:QI 0 "register_operand" "=r") - (udiv:QI (match_operand:HI 1 "general_operand" "0") - (match_operand:QI 2 "register_operand" "r")))] + (truncate:QI + (udiv:HI + (match_operand:HI 1 "general_operand" "0") + (zero_extend:HI (match_operand:QI 2 "register_operand" "r")))))] "" "divxu %X2,%T0" [(set_attr "length" "2") @@ -853,8 +855,10 @@ (define_insn "divqi3" [(set (match_operand:QI 0 "register_operand" "=r") - (div:QI (match_operand:HI 1 "general_operand" "0") - (match_operand:QI 2 "register_operand" "r")))] + (truncate:QI + (div:HI + (match_operand:HI 1 "general_operand" "0") + (sign_extend:HI (match_operand:QI 2 "register_operand" "r")))))] "" "divxu %X2,%T0" [(set_attr "length" "2") @@ -862,8 +866,10 @@ (define_insn "udivhi3" [(set (match_operand:HI 0 "register_operand" "=r") - (udiv:HI (match_operand:SI 1 "general_operand" "0") - (match_operand:HI 2 "register_operand" "r")))] + (truncate:HI + (udiv:SI + (match_operand:SI 1 "general_operand" "0") + (zero_extend:SI (match_operand:HI 2 "register_operand" "r")))))] "TARGET_H8300H" "divxu.w %T2,%S0" [(set_attr "length" "2") @@ -871,8 +877,10 @@ (define_insn "divhi3" [(set (match_operand:HI 0 "register_operand" "=r") - (div:HI (match_operand:SI 1 "general_operand" "0") - (match_operand:HI 2 "register_operand" "r")))] + (truncate:HI + (div:SI + (match_operand:SI 1 "general_operand" "0") + (sign_extend:SI (match_operand:HI 2 "register_operand" "r")))))] "TARGET_H8300H" "divxs.w %T2,%S0" [(set_attr "length" "4") @@ -884,8 +892,10 @@ (define_insn "umodqi3" [(set (match_operand:QI 0 "register_operand" "=r") - (umod:QI (match_operand:HI 1 "general_operand" "0") - (match_operand:QI 2 "register_operand" "r")))] + (truncate:QI + (umod:HI + (match_operand:HI 1 "general_operand" "0") + (zero_extend:HI (match_operand:QI 2 "register_operand" "r")))))] "" "divxu %X2,%T0\;mov %t0,%s0" [(set_attr "length" "4") @@ -893,8 +903,10 @@ (define_insn "modqi3" [(set (match_operand:QI 0 "register_operand" "=r") - (mod:QI (match_operand:HI 1 "general_operand" "0") - (match_operand:QI 2 "register_operand" "r")))] + (truncate:QI + (mod:HI + (match_operand:HI 1 "general_operand" "0") + (sign_extend:HI (match_operand:QI 2 "register_operand" "r")))))] "TARGET_H8300H" "divxs.b %X2,%T0\;mov %t0,%s0" [(set_attr "length" "6") @@ -902,8 +914,10 @@ (define_insn "umodhi3" [(set (match_operand:HI 0 "register_operand" "=r") - (umod:HI (match_operand:SI 1 "general_operand" "0") - (match_operand:HI 2 "register_operand" "r")))] + (truncate:HI + (umod:SI + (match_operand:SI 1 "general_operand" "0") + (zero_extend:SI (match_operand:HI 2 "register_operand" "r")))))] "TARGET_H8300H" "divxu.w %T2,%S0\;mov %e0,%f0" [(set_attr "length" "4") @@ -911,8 +925,10 @@ (define_insn "modhi3" [(set (match_operand:HI 0 "register_operand" "=r") - (mod:HI (match_operand:SI 1 "general_operand" "0") - (match_operand:HI 2 "register_operand" "r")))] + (truncate:HI + (mod:SI + (match_operand:SI 1 "general_operand" "0") + (sign_extend:SI (match_operand:HI 2 "register_operand" "r")))))] "TARGET_H8300H" "divxs.w %T2,%S0\;mov %e0,%f0" [(set_attr "length" "6") |