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| author | Pan Li <pan2.li@intel.com> | 2023-09-26 11:09:07 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-09-26 11:23:24 +0800 |
| commit | c983744307527793b09138420553bd18210c08ef (patch) | |
| tree | d2f684314453da2f8a2e9830b8049020ca41b460 | |
| parent | a435e4ab2e3032ea85893df42fa68f7792de31f9 (diff) | |
| download | gcc-c983744307527793b09138420553bd18210c08ef.zip gcc-c983744307527793b09138420553bd18210c08ef.tar.gz gcc-c983744307527793b09138420553bd18210c08ef.tar.bz2 | |
RISC-V: Rename rounding const fp function for refactor
The rounding related API shared one const, rename it to avoid
unnecessary redundant code.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
(get_fp_rounding_coefficient): Rename.
(gen_floor_const_fp): Remove.
(expand_vec_ceil): Take renamed func.
(expand_vec_floor): Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
| -rw-r--r-- | gcc/config/riscv/riscv-v.cc | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index a1ffefb..9a1df95 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -3548,7 +3548,7 @@ cmp_lmul_gt_one (machine_mode mode) greater than and equal to 4503599627370496. */ static rtx -gen_ceil_const_fp (machine_mode inner_mode) +get_fp_rounding_coefficient (machine_mode inner_mode) { REAL_VALUE_TYPE real; @@ -3565,13 +3565,6 @@ gen_ceil_const_fp (machine_mode inner_mode) } static rtx -gen_floor_const_fp (machine_mode inner_mode) -{ - /* The floor needs the same floating point const as ceil. */ - return gen_ceil_const_fp (inner_mode); -} - -static rtx emit_vec_float_cmp_mask (rtx fp_vector, rtx_code code, rtx fp_scalar, machine_mode vec_fp_mode) { @@ -3637,7 +3630,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_ceil_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding up (aka ceil). */ @@ -3662,7 +3655,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_floor_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding down (aka floor). */ |