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authorH.J. Lu <hongjiu.lu@intel.com>2015-01-25 04:42:50 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2015-01-24 20:42:50 -0800
commitc8f2dff2c64edbcfedfe95c1b5929ecee23c20e3 (patch)
tree1529237742ca10e96dab2018da3f0b158c79a26d
parente78954f87d2f573ec179aaa95b0b2ff28c46c047 (diff)
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Support new Intel processor model numbers
gcc/ * config/i386/driver-i386.c (host_detect_local_cpu): Check new Silvermont, Haswell, Broadwell and Knights Landing model numbers. * config/i386/i386.c (processor_model): Add M_INTEL_COREI7_BROADWELL. (arch_names_table): Add "broadwell". gcc/testsuite/ * gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add Silvermont, Ivy Bridge, Haswell and Broadwell tests. Update Sandy Bridge test. 2015-01-24 H.J. Lu <hongjiu.lu@intel.com> * config/i386/cpuinfo.c (processor_subtypes): Add INTEL_COREI7_BROADWELL. (get_intel_cpu): Support new Silvermont, Haswell and Broadwell model numbers. From-SVN: r220090
Diffstat
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/i386/driver-i386.c14
-rw-r--r--gcc/config/i386/i386.c4
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/gcc.target/i386/builtin_target.c30
-rw-r--r--libgcc/ChangeLog7
-rw-r--r--libgcc/config/i386/cpuinfo.c12
7 files changed, 80 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c6f1213..47d6ac5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-01-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Check new
+ Silvermont, Haswell, Broadwell and Knights Landing model numbers.
+ * config/i386/i386.c (processor_model): Add
+ M_INTEL_COREI7_BROADWELL.
+ (arch_names_table): Add "broadwell".
+
2015-01-24 Oleg Endo <olegendo@gcc.gnu.org>
PR target/49263
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index c731c50..c69149d 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -703,7 +703,10 @@ const char *host_detect_local_cpu (int argc, const char **argv)
cpu = "bonnell";
break;
case 0x37:
+ case 0x4a:
case 0x4d:
+ case 0x5a:
+ case 0x5d:
/* Silvermont. */
cpu = "silvermont";
break;
@@ -738,11 +741,22 @@ const char *host_detect_local_cpu (int argc, const char **argv)
cpu = "ivybridge";
break;
case 0x3c:
+ case 0x3f:
case 0x45:
case 0x46:
/* Haswell. */
cpu = "haswell";
break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ cpu = "broadwell";
+ break;
+ case 0x57:
+ /* Knights Landing. */
+ cpu = "knl";
+ break;
default:
if (arch)
{
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 82fc4c5..9ec40cb 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -35342,7 +35342,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMDFAM15H_BDVER3,
M_AMDFAM15H_BDVER4,
M_INTEL_COREI7_IVYBRIDGE,
- M_INTEL_COREI7_HASWELL
+ M_INTEL_COREI7_HASWELL,
+ M_INTEL_COREI7_BROADWELL
};
static struct _arch_names_table
@@ -35363,6 +35364,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
{"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
{"haswell", M_INTEL_COREI7_HASWELL},
+ {"broadwell", M_INTEL_COREI7_BROADWELL},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"knl", M_INTEL_KNL},
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b342a33..e785ed4 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-01-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
+ Silvermont, Ivy Bridge, Haswell and Broadwell tests. Update Sandy
+ Bridge test.
+
2015-01-24 Janne Blomqvist <jb@gcc.gnu.org>
PR libfortran/64770
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c
index b6a3eee..10c0568 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -30,6 +30,14 @@ check_intel_cpu_model (unsigned int family, unsigned int model,
/* Atom. */
assert (__builtin_cpu_is ("atom"));
break;
+ case 0x37:
+ case 0x4a:
+ case 0x4d:
+ case 0x5a:
+ case 0x5d:
+ /* Silvermont. */
+ assert (__builtin_cpu_is ("silvermont"));
+ break;
case 0x1a:
case 0x1e:
case 0x1f:
@@ -46,10 +54,32 @@ check_intel_cpu_model (unsigned int family, unsigned int model,
assert (__builtin_cpu_is ("westmere"));
break;
case 0x2a:
+ case 0x2d:
/* Sandy Bridge. */
assert (__builtin_cpu_is ("corei7"));
assert (__builtin_cpu_is ("sandybridge"));
break;
+ case 0x3a:
+ case 0x3e:
+ /* Ivy Bridge. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("ivybridge"));
+ break;
+ case 0x3c:
+ case 0x3f:
+ case 0x45:
+ case 0x46:
+ /* Haswell. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("haswell"));
+ break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("broadwell"));
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index a3e3893..3949c0a 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-01-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/cpuinfo.c (processor_subtypes): Add
+ INTEL_COREI7_BROADWELL.
+ (get_intel_cpu): Support new Silvermont, Haswell and Broadwell
+ model numbers.
+
2015-01-23 Uros Bizjak <ubizjak@gmail.com>
* config/i386/elf-lib.h: New file.
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index f0a676b..c80083e 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -75,6 +75,7 @@ enum processor_subtypes
AMDFAM15H_BDVER4,
INTEL_COREI7_IVYBRIDGE,
INTEL_COREI7_HASWELL,
+ INTEL_COREI7_BROADWELL,
CPU_SUBTYPE_MAX
};
@@ -185,7 +186,10 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
__cpu_model.__cpu_type = INTEL_BONNELL;
break;
case 0x37:
+ case 0x4a:
case 0x4d:
+ case 0x5a:
+ case 0x5d:
/* Silvermont. */
__cpu_model.__cpu_type = INTEL_SILVERMONT;
break;
@@ -217,12 +221,20 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
__cpu_model.__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
break;
case 0x3c:
+ case 0x3f:
case 0x45:
case 0x46:
/* Haswell. */
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ __cpu_model.__cpu_type = INTEL_COREI7;
+ __cpu_model.__cpu_subtype = INTEL_COREI7_BROADWELL;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
generated by cgit v1.1 at 2025-08-17 10:52:59 +0000