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author | Jeff Law <law@gcc.gnu.org> | 1993-03-17 15:26:54 -0700 |
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committer | Jeff Law <law@gcc.gnu.org> | 1993-03-17 15:26:54 -0700 |
commit | c1fab105004e090a30a4ffb6f0892515ec46e4a1 (patch) | |
tree | e966484c30ce5ef0804530d8d85163dac5ada368 | |
parent | 6a7d5990f4a5c2c03bce867fbf5ca2395636e794 (diff) | |
download | gcc-c1fab105004e090a30a4ffb6f0892515ec46e4a1.zip gcc-c1fab105004e090a30a4ffb6f0892515ec46e4a1.tar.gz gcc-c1fab105004e090a30a4ffb6f0892515ec46e4a1.tar.bz2 |
pa.md (pre_ldwm, pre_stwm): Name these patterns to make generating them easier.
* pa.md (pre_ldwm, pre_stwm): Name these patterns to make
generating them easier.
*post_ldwm, post_stwm): New patterns.
(add_high_const): New pattern.
(return): New pattern.
From-SVN: r3772
-rw-r--r-- | gcc/config/pa/pa.md | 58 |
1 files changed, 56 insertions, 2 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 5657887..53cdb2b 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -911,7 +911,7 @@ ;; Load or store with base-register modification. -(define_insn "" +(define_insn "pre_ldwm" [(set (match_operand:SI 3 "register_operand" "=r") (mem:SI (plus:SI (match_operand:SI 1 "register_operand" "0") (match_operand:SI 2 "pre_cint_operand" "")))) @@ -927,7 +927,7 @@ [(set_attr "type" "load") (set_attr "length" "1")]) -(define_insn "" +(define_insn "pre_stwm" [(set (mem:SI (plus:SI (match_operand:SI 1 "register_operand" "0") (match_operand:SI 2 "pre_cint_operand" ""))) (match_operand:SI 3 "reg_or_0_operand" "rM")) @@ -943,6 +943,38 @@ [(set_attr "type" "store") (set_attr "length" "1")]) +(define_insn "post_ldwm" + [(set (match_operand:SI 3 "register_operand" "r") + (mem:SI (match_operand:SI 1 "register_operand" "0"))) + (set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (match_dup 1) + (match_operand:SI 2 "post_cint_operand" "")))] + "" + "* +{ + if (INTVAL (operands[2]) > 0) + return \"ldwm %2(0,%0),%3\"; + return \"ldws,ma %2(0,%0),%3\"; +}" + [(set_attr "type" "load") + (set_attr "length" "1")]) + +(define_insn "post_stwm" + [(set (mem:SI (match_operand:SI 1 "register_operand" "0")) + (match_operand:SI 3 "reg_or_0_operand" "rM")) + (set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (match_dup 1) + (match_operand:SI 2 "post_cint_operand" "")))] + "" + "* +{ + if (INTVAL (operands[2]) > 0) + return \"stwm %r3,%2(0,%0)\"; + return \"stws,ma %r3,%2(0,%0)\"; +}" + [(set_attr "type" "store") + (set_attr "length" "1")]) + ;; For pic (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r") @@ -1006,6 +1038,22 @@ [(set_attr "type" "binary,binary") (set_attr "length" "1,2")]) +;; This is for use in the prologue/epilogue code. We need it +;; to add large constants to a stack pointer or frame pointer. +;; Because of the additional %r1 pressure, we probably do not +;; want to use this in general code, so make it available +;; only after reload. +(define_insn "add_high_const" + [(set (match_operand:SI 0 "register_operand" "=!a,*r") + (plus (match_operand:SI 1 "register_operand" "r,r") + (high:SI (match_operand 2 "const_int_operand" ""))))] + "reload_completed" + "@ + addil L'%G2,%1 + ldil L'%G2,%0\;add %0,%1,%0" + [(set_attr "type" "binary,binary") + (set_attr "length" "1,2")]) + ;; For function addresses when TARGET_SHARED_LIBS (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r") @@ -2512,6 +2560,12 @@ ;; Unconditional and other jump instructions. +(define_insn "return" + [(return)] + "hppa_can_use_return_insn_p ()" + "bv%* 0(%%r2)" + [(set_attr "type" "branch")]) + (define_insn "jump" [(set (pc) (label_ref (match_operand 0 "" "")))] "" |