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| author | Joseph Myers <joseph@codesourcery.com> | 2008-12-05 16:09:12 +0000 |
|---|---|---|
| committer | Joseph Myers <jsm28@gcc.gnu.org> | 2008-12-05 16:09:12 +0000 |
| commit | c187a21f76390d3bfd0ca2235ec432c23147f957 (patch) | |
| tree | 79005340846756f46525469bd20161e9929f7582 | |
| parent | 6fc4fb069d3d11880c98cd3de62e6aa1ed26ca87 (diff) | |
| download | gcc-c187a21f76390d3bfd0ca2235ec432c23147f957.zip gcc-c187a21f76390d3bfd0ca2235ec432c23147f957.tar.gz gcc-c187a21f76390d3bfd0ca2235ec432c23147f957.tar.bz2 | |
rs6000.md (move_from_CR_gt_bit): Enable for TARGET_HARD_FLOAT && !TARGET_FPRS, not TARGET_E500.
* config/rs6000/rs6000.md (move_from_CR_gt_bit): Enable for
TARGET_HARD_FLOAT && !TARGET_FPRS, not TARGET_E500.
* config/rs6000/spe.md (e500_cr_ior_compare): Likewise.
testsuite:
* gcc.target/powerpc/20081204-1.c: New test.
From-SVN: r142477
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/spe.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/20081204-1.c | 7 |
5 files changed, 19 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 60d4455..e42d80e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2008-12-05 Joseph Myers <joseph@codesourcery.com> + + * config/rs6000/rs6000.md (move_from_CR_gt_bit): Enable for + TARGET_HARD_FLOAT && !TARGET_FPRS, not TARGET_E500. + * config/rs6000/spe.md (e500_cr_ior_compare): Likewise. + 2008-12-05 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/37716 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4fa690d..b1df32a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -12215,7 +12215,7 @@ (define_insn "move_from_CR_gt_bit" [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (unspec:SI [(match_operand 1 "cc_reg_operand" "y")] UNSPEC_MV_CR_GT))] - "TARGET_E500" + "TARGET_HARD_FLOAT && !TARGET_FPRS" "mfcr %0\;{rlinm|rlwinm} %0,%0,%D1,31,31" [(set_attr "type" "mfcr") (set_attr "length" "8")]) diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index 96be255..50736f1 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -3135,7 +3135,7 @@ (unspec:CCFP [(match_operand 1 "cc_reg_operand" "y") (match_operand 2 "cc_reg_operand" "y")] E500_CR_IOR_COMPARE))] - "TARGET_E500" + "TARGET_HARD_FLOAT && !TARGET_FPRS" "cror 4*%0+gt,4*%1+gt,4*%2+gt" [(set_attr "type" "cr_logical")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 143eb23..d342035 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2008-12-05 Joseph Myers <joseph@codesourcery.com> + + * gcc.target/powerpc/20081204-1.c: New test. + 2008-12-05 Richard Guenther <rguenther@suse.de> PR testsuite/38406 diff --git a/gcc/testsuite/gcc.target/powerpc/20081204-1.c b/gcc/testsuite/gcc.target/powerpc/20081204-1.c new file mode 100644 index 0000000..ba4df8f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/20081204-1.c @@ -0,0 +1,7 @@ +/* Test for ICE arising from inconsistent use of TARGET_E500 versus + TARGET_HARD_FLOAT && !TARGET_FPRS. */ +/* { dg-do compile } */ +/* { dg-options "-mcpu=750 -mfloat-gprs=single" } */ +static int comp(const void *a,const void *b){ + return (*(float *)a<*(float *)b)-(*(float *)a>*(float *)b); +} |