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| author | Venkataramanan Kumar <venkataramanan.kumar@amd.com> | 2016-03-05 12:33:09 +0000 |
|---|---|---|
| committer | Venkataramanan Kumar <vekumar@gcc.gnu.org> | 2016-03-05 12:33:09 +0000 |
| commit | bdf2429be8efc162b83b173e05ea0b14c08fed6d (patch) | |
| tree | 4378a33161ab1fee33c7dbdcdb446ac42e2f5d05 | |
| parent | 4cd4d5576c7aa143152b1d4f8acce192ec8f0e8a (diff) | |
| download | gcc-bdf2429be8efc162b83b173e05ea0b14c08fed6d.zip gcc-bdf2429be8efc162b83b173e05ea0b14c08fed6d.tar.gz gcc-bdf2429be8efc162b83b173e05ea0b14c08fed6d.tar.bz2 | |
Fix sseimul type attribute.
2016-03-05 Venkataramanan Kumar <Venkataramanan.kumar@amd.com>
Fix sseimul type attribute.
* config/i386/znver1.md
(znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load,
znver1_sseimul_avx256_load) : Fix the type attribute.
(znver1_sseimul_di,
znver1_sseimul_load_di): Fix type attribute, pipe usage and latency.
From-SVN: r234007
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/znver1.md | 20 |
2 files changed, 19 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1c775b2..d0b7dfd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-03-05 Venkataramanan Kumar <Venkataramanan.kumar@amd.com> + + Fix sseimul type attribute. + * config/i386/znver1.md + (znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load, + znver1_sseimul_avx256_load) : Fix the type attribute. + (znver1_sseimul_di, + znver1_sseimul_load_di): Fix type attribute, pipe usage and latency. + 2016-03-05 Jakub Jelinek <jakub@redhat.com> PR c++/70084 diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md index 3db3bed..1d28c05 100644 --- a/gcc/config/i386/znver1.md +++ b/gcc/config/i386/znver1.md @@ -913,44 +913,44 @@ (define_insn_reservation "znver1_sseimul" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "TI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "none")))) "znver1-direct,znver1-fp0*3") (define_insn_reservation "znver1_sseimul_avx256" 4 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "OI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "none")))) "znver1-double,znver1-fp0*4") (define_insn_reservation "znver1_sseimul_load" 7 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "TI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) "znver1-direct,znver1-load,znver1-fp0*3") (define_insn_reservation "znver1_sseimul_avx256_load" 8 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "OI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-fp0*4") -(define_insn_reservation "znver1_sseimul_di" 4 +(define_insn_reservation "znver1_sseimul_di" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "DI") (and (eq_attr "memory" "none") - (eq_attr "type" "ssemul")))) - "znver1-direct,znver1-fp0*4") + (eq_attr "type" "sseimul")))) + "znver1-direct,znver1-fp0*3") -(define_insn_reservation "znver1_sseimul_load_di" 8 +(define_insn_reservation "znver1_sseimul_load_di" 7 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "DI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) - "znver1-direct,znver1-load,znver1-fp0*4") + "znver1-direct,znver1-load,znver1-fp0*3") ;; SSE compares (define_insn_reservation "znver1_sse_cmp" 1 |