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| author | Kito Cheng <kito.cheng@sifive.com> | 2023-03-22 18:47:52 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-03-23 11:14:12 +0800 |
| commit | ba31f9a3c8fa9405a9a58094d6dc83bab0823786 (patch) | |
| tree | 4c311ffdbbad58be43b4fa061c2e591250de668d | |
| parent | 7712736376b2ee775f88976117b4e8b4ea37841b (diff) | |
| download | gcc-ba31f9a3c8fa9405a9a58094d6dc83bab0823786.zip gcc-ba31f9a3c8fa9405a9a58094d6dc83bab0823786.tar.gz gcc-ba31f9a3c8fa9405a9a58094d6dc83bab0823786.tar.bz2 | |
RISC-V: Add riscv_vector target check
Add target check funciton to ensure vector extension can be used.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp (check_effective_target_riscv_vector):
New.
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 5e4a73a..932aa5b 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1759,6 +1759,18 @@ proc check_linker_plugin_available { } { } "-flto -fuse-linker-plugin"] } +# Return 1 if the target has RISC-V vector extension, 0 otherwise. +# Cache the result. + +proc check_effective_target_riscv_vector { } { + # Check that we are compiling for v by checking the __riscv_v marco. + return [check_no_compiler_messages riscv_vector assembly { + #if !defined(__riscv_v) + #error "__riscv_v not defined!" + #endif + }] +} + # Return 1 if the target is RV32, 0 otherwise. Cache the result. proc check_effective_target_rv32 { } { |