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| author | Richard Biener <rguenther@suse.de> | 2023-12-13 09:38:59 +0100 |
|---|---|---|
| committer | Richard Biener <rguenther@suse.de> | 2023-12-13 09:42:17 +0100 |
| commit | b9baead90d74e9211fc94d655ecd5d3af3858158 (patch) | |
| tree | 4737f9f5a7c35318dc7b194a9c23c35f89a2823d | |
| parent | 97094d2ffd7d00261e6d7cc5d4a62dc7c2c89b64 (diff) | |
| download | gcc-b9baead90d74e9211fc94d655ecd5d3af3858158.zip gcc-b9baead90d74e9211fc94d655ecd5d3af3858158.tar.gz gcc-b9baead90d74e9211fc94d655ecd5d3af3858158.tar.bz2 | |
tree-optimization/112990 - unsupported VEC_PERM from match pattern
The following avoids creating an unsupported VEC_PERM after vector
lowering from the pattern merging a bit-insert from a bit-field-ref
to a VEC_PERM. For the already existing s390 testcase we get
TImode vectors which later ICE during attempted expansion of
a vec_perm_const.
PR tree-optimization/112990
* match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..):
Restrict to vector modes after lowering.
| -rw-r--r-- | gcc/match.pd | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/match.pd b/gcc/match.pd index 15bca21..e3dcff5 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -8505,6 +8505,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (simplify (bit_insert @0 (BIT_FIELD_REF@2 @1 @rsize @rpos) @ipos) (if (VECTOR_TYPE_P (type) + && (VECTOR_MODE_P (TYPE_MODE (type)) + || optimize_vectors_before_lowering_p ()) && types_match (@0, @1) && types_match (TREE_TYPE (TREE_TYPE (@0)), TREE_TYPE (@2)) && TYPE_VECTOR_SUBPARTS (type).is_constant ()) |