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| author | Alex Coplan <alex.coplan@arm.com> | 2023-11-07 21:25:02 +0000 |
|---|---|---|
| committer | Alex Coplan <alex.coplan@arm.com> | 2023-12-15 19:59:59 +0000 |
| commit | b73a685ebf498af62f6a8743303c20fcdee827a1 (patch) | |
| tree | 0d1cf369ab98bae601454513834451d48a512929 | |
| parent | 94415eb7a464e855c37ab01ab300fa5e87e4c4a3 (diff) | |
| download | gcc-b73a685ebf498af62f6a8743303c20fcdee827a1.zip gcc-b73a685ebf498af62f6a8743303c20fcdee827a1.tar.gz gcc-b73a685ebf498af62f6a8743303c20fcdee827a1.tar.bz2 | |
aarch64: Fix up printing of ldp/stp with -msve-vector-bits=128
Later patches allow using SVE modes in ldp/stp with -msve-vector-bits=128,
so we need to make sure that we don't use SVE addressing modes when
printing the address for the ldp/stp.
This patch does that.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_print_address_internal): Handle SVE
modes when printing ldp/stp addresses.
| -rw-r--r-- | gcc/config/aarch64/aarch64.cc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 6d973b3..b8eb8d6 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -12345,6 +12345,9 @@ aarch64_print_address_internal (FILE *f, machine_mode mode, rtx x, return false; } + const bool load_store_pair_p = (type == ADDR_QUERY_LDP_STP + || type == ADDR_QUERY_LDP_STP_N); + if (aarch64_classify_address (&addr, x, mode, true, type)) switch (addr.type) { @@ -12356,7 +12359,7 @@ aarch64_print_address_internal (FILE *f, machine_mode mode, rtx x, } vec_flags = aarch64_classify_vector_mode (mode); - if (vec_flags & VEC_ANY_SVE) + if ((vec_flags & VEC_ANY_SVE) && !load_store_pair_p) { HOST_WIDE_INT vnum = exact_div (addr.const_offset, @@ -12366,6 +12369,9 @@ aarch64_print_address_internal (FILE *f, machine_mode mode, rtx x, return true; } + if (!CONST_INT_P (addr.offset)) + return false; + asm_fprintf (f, "[%s, %wd]", reg_names[REGNO (addr.base)], INTVAL (addr.offset)); return true; |