AVX512FP16: Add testcase for vfmaddsub[132,213,231]ph/vfmsubadd[132,213,231]ph.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512fp16-vfmaddsubXXXph-1a.c: New test.
	* gcc.target/i386/avx512fp16-vfmaddsubXXXph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmsubaddXXXph-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmsubaddXXXph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1a.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1a.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1b.c: Ditto.

8 files changed, 488 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1a.c
new file mode 100644
index 0000000..7063646
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h x1, x2, x3;
+volatile __mmask32 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmaddsub_ph (x1, x2, x3);
+  x1 = _mm512_mask_fmaddsub_ph (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmaddsub_ph (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmaddsub_ph (m, x1, x2, x3);
+  x1 = _mm512_fmaddsub_round_ph (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  x1 = _mm512_mask_fmaddsub_round_ph (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+  x3 = _mm512_mask3_fmaddsub_round_ph (x1, x2, x3, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  x1 = _mm512_maskz_fmaddsub_round_ph (m, x1, x2, x3, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1b.c
new file mode 100644
index 0000000..16cf0af1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddsubXXXph-1b.c
@@ -0,0 +1,171 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(fmaddsub_ph) (V512 * dest, V512 op1, V512 op2,
+                    __mmask32 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+    __mmask16 m1, m2;
+
+    m1 = k & 0xffff;
+    m2 = (k >> 16) & 0xffff;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    for (i = 0; i < 16; i++) {
+        if (((1 << i) & m1) == 0) {
+            if (zero_mask) {
+                v5.f32[i] = 0;
+            }
+            else {
+                v5.u32[i] = v7.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v5.f32[i] = v1.f32[i] * v3.f32[i] + v7.f32[i];
+            }
+            else {
+                v5.f32[i] = v1.f32[i] * v3.f32[i] - v7.f32[i];
+            }
+        }
+
+        if (((1 << i) & m2) == 0) {
+            if (zero_mask) {
+                v6.f32[i] = 0;
+            }
+            else {
+                v6.u32[i] = v8.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v6.f32[i] = v2.f32[i] * v4.f32[i] + v8.f32[i];
+            }
+            else {
+                v6.f32[i] = v2.f32[i] * v4.f32[i] - v8.f32[i];
+            }
+        }
+    }
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void NOINLINE
+EMULATE(m_fmaddsub_ph) (V512 * dest, V512 op1, V512 op2,
+                    __mmask32 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+    __mmask16 m1, m2;
+
+    m1 = k & 0xffff;
+    m2 = (k >> 16) & 0xffff;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    for (i = 0; i < 16; i++) {
+        if (((1 << i) & m1) == 0) {
+            if (zero_mask) {
+                v5.f32[i] = 0;
+            }
+            else {
+                v5.u32[i] = v7.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v5.f32[i] = v1.f32[i] * v7.f32[i] + v3.f32[i];
+            }
+            else {
+                v5.f32[i] = v1.f32[i] * v7.f32[i] - v3.f32[i];
+            }
+        }
+
+        if (((1 << i) & m2) == 0) {
+            if (zero_mask) {
+                v6.f32[i] = 0;
+            }
+            else {
+                v6.u32[i] = v8.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v6.f32[i] = v2.f32[i] * v8.f32[i] + v4.f32[i];
+            }
+            else {
+                v6.f32[i] = v2.f32[i] * v8.f32[i] - v4.f32[i];
+            }
+        }
+    }
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  NET_MASK, 0);
+  HF(res) = INTRINSIC (_fmaddsub_ph) (HF(src1), HF(src2), HF(res));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask3_fmaddsub_ph) (HF(src1), HF(src2),
+				      HF(res), MASK_VALUE);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask3_fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(m_fmaddsub_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_fmaddsub_ph) (HF(res), MASK_VALUE,
+				     HF(src1), HF(src2));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_fmaddsub_ph) (ZMASK_VALUE, HF(src1),
+				      HF(src2), HF(res));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_fmaddsub_ph);
+
+  init_dest(&res, &exp);
+#if AVX512F_LEN == 512
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  NET_MASK, 0);
+  HF(res) = INTRINSIC (_fmaddsub_round_ph) (HF(src1), HF(src2),
+				      HF(res), _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask3_fmaddsub_round_ph) (HF(src1), HF(src2),
+					    HF(res), MASK_VALUE, _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask3_fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(m_fmaddsub_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_fmaddsub_round_ph) (HF(res), MASK_VALUE,
+					   HF(src1), HF(src2), _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_fmaddsub_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmaddsub_ph)(&exp, src1, src2,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_fmaddsub_round_ph) (ZMASK_VALUE, HF(src1),
+					    HF(src2), HF(res), _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_fmaddsub_ph);
+#endif
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1a.c
new file mode 100644
index 0000000..87087c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h x1, x2, x3;
+volatile __mmask32 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmsubadd_ph (x1, x2, x3);
+  x1 = _mm512_mask_fmsubadd_ph (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmsubadd_ph (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmsubadd_ph (m, x1, x2, x3);
+  x1 = _mm512_fmsubadd_round_ph (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  x1 = _mm512_mask_fmsubadd_round_ph (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+  x3 = _mm512_mask3_fmsubadd_round_ph (x1, x2, x3, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  x1 = _mm512_maskz_fmsubadd_round_ph (m, x1, x2, x3, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1b.c
new file mode 100644
index 0000000..159cae4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubaddXXXph-1b.c
@@ -0,0 +1,175 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(fmsubadd_ph) (V512 * dest, V512 op1, V512 op2,
+                    __mmask32 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+    __mmask16 m1, m2;
+
+    m1 = k & 0xffff;
+    m2 = (k >> 16) & 0xffff;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    for (i = 0; i < 16; i++) {
+        if (((1 << i) & m1) == 0) {
+            if (zero_mask) {
+               v5.f32[i] = 0;
+            }
+            else {
+                v5.u32[i] = v7.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v5.f32[i] = v1.f32[i] * v3.f32[i] - v7.f32[i];
+            }
+            else {
+                v5.f32[i] = v1.f32[i] * v3.f32[i] + v7.f32[i];
+            }
+        }
+
+        if (((1 << i) & m2) == 0) {
+            if (zero_mask) {
+               v6.f32[i] = 0;
+            }
+            else {
+                v6.u32[i] = v8.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v6.f32[i] = v2.f32[i] * v4.f32[i] - v8.f32[i];
+            }
+            else {
+                v6.f32[i] = v2.f32[i] * v4.f32[i] + v8.f32[i];
+            }
+        }
+    }
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void NOINLINE
+EMULATE(m_fmsubadd_ph) (V512 * dest, V512 op1, V512 op2,
+                    __mmask32 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+    __mmask16 m1, m2;
+
+    m1 = k & 0xffff;
+    m2 = (k >> 16) & 0xffff;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    for (i = 0; i < 16; i++) {
+        if (((1 << i) & m1) == 0) {
+            if (zero_mask) {
+               v5.f32[i] = 0;
+            }
+            else {
+                v5.u32[i] = v7.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v5.f32[i] = v1.f32[i] * v7.f32[i] - v3.f32[i];
+            }
+            else {
+                v5.f32[i] = v1.f32[i] * v7.f32[i] + v3.f32[i];
+            }
+        }
+
+        if (((1 << i) & m2) == 0) {
+            if (zero_mask) {
+               v6.f32[i] = 0;
+            }
+            else {
+                v6.u32[i] = v8.u32[i];
+            }
+        }
+        else {
+            if (i % 2 == 1) {
+                v6.f32[i] = v2.f32[i] * v8.f32[i] - v4.f32[i];
+            }
+            else {
+                v6.f32[i] = v2.f32[i] * v8.f32[i] + v4.f32[i];
+            }
+        }
+    }
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  NET_MASK, 0);
+  HF(res) = INTRINSIC (_fmsubadd_ph) (HF(src1), HF(src2), HF(res));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask3_fmsubadd_ph) (HF(src1), HF(src2),
+				      HF(res), MASK_VALUE);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask3_fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(m_fmsubadd_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_fmsubadd_ph) (HF(res), MASK_VALUE,
+				     HF(src1), HF(src2));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_fmsubadd_ph) (ZMASK_VALUE, HF(src1),
+				      HF(src2), HF(res));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_fmsubadd_ph);
+
+  init_dest(&res, &exp);
+#if AVX512F_LEN == 512
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  NET_MASK, 0);
+  HF(res) = INTRINSIC (_fmsubadd_round_ph) (HF(src1), HF(src2),
+				      HF(res), _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask3_fmsubadd_round_ph) (HF(src1), HF(src2),
+					    HF(res), MASK_VALUE,
+					    _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask3_fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(m_fmsubadd_ph)(&exp, src1, src2,  MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_fmsubadd_round_ph) (HF(res), MASK_VALUE,
+					   HF(src1), HF(src2),
+					   _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_fmsubadd_ph);
+  init_dest(&res, &exp);
+  EMULATE(fmsubadd_ph)(&exp, src1, src2,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_fmsubadd_round_ph) (ZMASK_VALUE, HF(src1),
+					    HF(src2), HF(res),
+					    _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_fmsubadd_ph);
+#endif
+
+  if (n_errs != 0) {
+    abort ();
+  }
+}
+
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1a.c
new file mode 100644
index 0000000..963fbb6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h yy, y2, y3;
+volatile __m128h xx, x2, x3;
+volatile __mmask8 m;
+volatile __mmask16 m16;
+
+void extern
+avx512vl_test (void)
+{
+  yy = _mm256_mask_fmaddsub_ph (yy, m16, y2, y3);
+  xx = _mm_mask_fmaddsub_ph (xx, m, x2, x3);
+
+  y3 = _mm256_mask3_fmaddsub_ph (yy, y2, y3, m16);
+  x3 = _mm_mask3_fmaddsub_ph (xx, x2, x3, m);
+
+  yy = _mm256_maskz_fmaddsub_ph (m16, yy, y2, y3);
+  xx = _mm_maskz_fmaddsub_ph (m, xx, x2, x3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1b.c
new file mode 100644
index 0000000..7f9748b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmaddsubXXXph-1b.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vfmaddsubXXXph-1b.c"
+                             
+#undef AVX512F_LEN           
+#undef AVX512F_LEN_HALF      
+                             
+#define AVX512F_LEN 128      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vfmaddsubXXXph-1b.c"
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1a.c
new file mode 100644
index 0000000..0316b8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h yy, y2, y3;
+volatile __m128h xx, x2, x3;
+volatile __mmask8 m;
+volatile __mmask16 m16;
+
+void extern
+avx512vl_test (void)
+{
+  yy = _mm256_mask_fmsubadd_ph (yy, m16, y2, y3);
+  xx = _mm_mask_fmsubadd_ph (xx, m, x2, x3);
+
+  y3 = _mm256_mask3_fmsubadd_ph (yy, y2, y3, m16);
+  x3 = _mm_mask3_fmsubadd_ph (xx, x2, x3, m);
+
+  yy = _mm256_maskz_fmsubadd_ph (m16, yy, y2, y3);
+  xx = _mm_maskz_fmsubadd_ph (m, xx, x2, x3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1b.c
new file mode 100644
index 0000000..c8caca1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmsubaddXXXph-1b.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vfmsubaddXXXph-1b.c"
+                             
+#undef AVX512F_LEN           
+#undef AVX512F_LEN_HALF      
+                             
+#define AVX512F_LEN 128      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vfmsubaddXXXph-1b.c"
+