S/390: Move and rename vector check.

Move the target support routine for the vector facility to the common
code file.  This is required to enable the generic vectorization tests
on S/390.  While doing this the too generic name for the check (vector)
is changed to s390_vx.  The renaming required to modify all the
testcases currently using that check.

gcc/testsuite/ChangeLog:

2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gcc.target/s390/s390.exp (check_effective_target_vector):
	Include target-supports.exp and move target_vector check routine
	...
	* lib/target-supports.exp (check_effective_target_s390_vx): ... to
	here and rename it.
	* gcc.target/s390/htm-builtins-z13-1.c: Rename effective target
	check from vector to s390_vx.
	* gcc.target/s390/target-attribute/tpragma-struct-vx-1.c: Likewise.
	* gcc.target/s390/target-attribute/tpragma-struct-vx-2.c: Likewise.
	* gcc.target/s390/vector/stpcpy-1.c: Likewise.
	* gcc.target/s390/vector/vec-abi-vararg-1.c: Likewise.
	* gcc.target/s390/vector/vec-clobber-1.c: Likewise.
	* gcc.target/s390/vector/vec-genbytemask-1.c: Likewise.
	* gcc.target/s390/vector/vec-genmask-1.c: Likewise.
	* gcc.target/s390/vector/vec-nopeel-1.c: Likewise.
	* gcc.target/s390/vector/vec-vrepi-1.c: Likewise.

From-SVN: r246449

13 files changed, 48 insertions, 25 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 359673f..6cfa9f6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,24 @@
 2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
+	* gcc.target/s390/s390.exp (check_effective_target_vector):
+	Include target-supports.exp and move target_vector check routine
+	...
+	* lib/target-supports.exp (check_effective_target_s390_vx): ... to
+	here and rename it.
+	* gcc.target/s390/htm-builtins-z13-1.c: Rename effective target
+	check from vector to s390_vx.
+	* gcc.target/s390/target-attribute/tpragma-struct-vx-1.c: Likewise.
+	* gcc.target/s390/target-attribute/tpragma-struct-vx-2.c: Likewise.
+	* gcc.target/s390/vector/stpcpy-1.c: Likewise.
+	* gcc.target/s390/vector/vec-abi-vararg-1.c: Likewise.
+	* gcc.target/s390/vector/vec-clobber-1.c: Likewise.
+	* gcc.target/s390/vector/vec-genbytemask-1.c: Likewise.
+	* gcc.target/s390/vector/vec-genmask-1.c: Likewise.
+	* gcc.target/s390/vector/vec-nopeel-1.c: Likewise.
+	* gcc.target/s390/vector/vec-vrepi-1.c: Likewise.
+
+2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
 	* gcc.target/s390/vector/vec-init-2.c: New test.
 
 2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
diff --git a/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c b/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c
index 7879c36..aaca1f4 100644
--- a/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c
+++ b/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c
@@ -1,7 +1,7 @@
 /* Verify if VRs are saved and restored.  */
 
 /* { dg-do run } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-O3 -march=z13 -mzarch" } */
 
 typedef int __attribute__((vector_size(16))) v4si;
diff --git a/gcc/testsuite/gcc.target/s390/s390.exp b/gcc/testsuite/gcc.target/s390/s390.exp
index cab68e8..d7a61f4 100644
--- a/gcc/testsuite/gcc.target/s390/s390.exp
+++ b/gcc/testsuite/gcc.target/s390/s390.exp
@@ -26,6 +26,7 @@ if ![istarget s390*-*-*] then {
 
 # Load support procs.
 load_lib gcc-dg.exp
+load_lib target-supports.exp
 
 # Return 1 if the the assembler understands .machine and .machinemode.  The
 # target attribute needs that feature to work.
@@ -55,21 +56,6 @@ proc check_effective_target_htm { } {
     }] "-march=zEC12 -mzarch" ] } { return 0 } else { return 1 }
 }
 
-# Return 1 if vector (va - vector add) instructions are understood by
-# the assembler and can be executed.  This also covers checking for
-# the VX kernel feature.  A kernel without that feature does not
-# enable the vector facility and the following check will die with a
-# signal.
-proc check_effective_target_vector { } {
-    if { ![check_runtime s390_check_vector [subst {
-	int main (void)
-	{
-	    asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
-	    return 0;
-	}
-    }] "-march=z13 -mzarch" ] } { return 0 } else { return 1 }
-}
-
 global s390_cached_flags
 set s390_cached_flags ""
 global s390_cached_value
diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-1.c b/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-1.c
index d471033..a0f4d1c 100644
--- a/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-1.c
+++ b/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-1.c
@@ -2,7 +2,7 @@
 
 /* { dg-do run } */
 /* { dg-require-effective-target target_attribute } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-march=z900 -mno-vx -mzarch" } */
 
 #define V16 __attribute__ ((vector_size(16)))
diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-2.c b/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-2.c
index a238dce..652b122 100644
--- a/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-2.c
+++ b/gcc/testsuite/gcc.target/s390/target-attribute/tpragma-struct-vx-2.c
@@ -2,7 +2,7 @@
 
 /* { dg-do run } */
 /* { dg-require-effective-target target_attribute } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-march=z13 -mvx -mzarch" } */
 
 #define V16 __attribute__ ((vector_size(16)))
diff --git a/gcc/testsuite/gcc.target/s390/vector/stpcpy-1.c b/gcc/testsuite/gcc.target/s390/vector/stpcpy-1.c
index 91c1f7c..aed20e5 100644
--- a/gcc/testsuite/gcc.target/s390/vector/stpcpy-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/stpcpy-1.c
@@ -4,7 +4,7 @@
    strings.  */
 
 /* { dg-do run } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-O3 -mzarch -march=z13" } */
 
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c
index 59740c5..9d4d5bd 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c
@@ -2,7 +2,7 @@
    ABI.  */
 
 /* { dg-do run { target { s390*-*-* } } } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
 
 /* Make sure arguments are fetched from the argument overflow area.  */
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-clobber-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-clobber-1.c
index 413b6a0..c55cc68 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-clobber-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-clobber-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { s390*-*-* } } } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-options "-O3 -mzarch -march=z13" } */
 
 /* For FP zero checks we use the ltdbr instruction.  Since this is an
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c
index 26c189a..30ef05e 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 /* { dg-require-effective-target int128 } */
 
 typedef unsigned char     uv16qi __attribute__((vector_size(16)));
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c
index 6093422..f303087 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 
 typedef unsigned char     uv16qi __attribute__((vector_size(16)));
 typedef unsigned short     uv8hi __attribute__((vector_size(16)));
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-nopeel-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-nopeel-1.c
index 581c371..6c9a2e1 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-nopeel-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-nopeel-1.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -mzarch -march=z13" } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 
 int
 foo (int * restrict a, int n)
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-vrepi-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-vrepi-1.c
index 27bf39e..bfb9974 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-vrepi-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-vrepi-1.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
-/* { dg-require-effective-target vector } */
+/* { dg-require-effective-target s390_vx } */
 
 typedef unsigned char     uv16qi __attribute__((vector_size(16)));
 typedef unsigned short     uv8hi __attribute__((vector_size(16)));
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 152b7d9..290c527 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8209,6 +8209,24 @@ proc check_effective_target_profile_update_atomic {} {
     } "-fprofile-update=atomic -fprofile-generate"]
 }
 
+# Return 1 if vector (va - vector add) instructions are understood by
+# the assembler and can be executed.  This also covers checking for
+# the VX kernel feature.  A kernel without that feature does not
+# enable the vector facility and the following check will die with a
+# signal.
+proc check_effective_target_s390_vx { } {
+    if ![istarget s390*-*-*] then {
+	return 0;
+    }
+
+    return [check_runtime s390_check_vx {
+	int main (void)
+	{
+	    asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
+	    return 0;
+	}
+    } "-march=z13 -mzarch" ]
+}
 #For versions of ARM architectures that have hardware div insn,
 #disable the divmod transform