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| author | Michael Collison <collison@rivosinc.com> | 2023-05-06 11:13:35 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro> | 2023-05-06 11:16:59 -0600 |
| commit | b3e5cb9dc33628c7fee225c6a1bab68d2679d108 (patch) | |
| tree | 5213c18ae3d77cf72b77226fa335654b48c0a12d | |
| parent | d90eed13ae655fbb4adb173fdae392b082e82a56 (diff) | |
| download | gcc-b3e5cb9dc33628c7fee225c6a1bab68d2679d108.zip gcc-b3e5cb9dc33628c7fee225c6a1bab68d2679d108.tar.gz gcc-b3e5cb9dc33628c7fee225c6a1bab68d2679d108.tar.bz2 | |
RISC-V: autovec: Add new predicates and function prototypes
gcc/
* config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
(riscv_vector_get_mask_mode): Ditto.
(get_mask_policy_no_pred): Ditto.
(get_tail_policy_no_pred): Ditto.
| -rw-r--r-- | gcc/config/riscv/riscv-protos.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 6086306..d83ea2c 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -218,6 +218,10 @@ bool slide1_sew64_helper (int, machine_mode, machine_mode, rtx gen_avl_for_scalar_move (rtx); void expand_tuple_move (machine_mode, rtx *); machine_mode preferred_simd_mode (scalar_mode); +extern bool riscv_vector_mask_mode_p (machine_mode); +extern opt_machine_mode riscv_vector_get_mask_mode (machine_mode mode); +extern rtx get_mask_policy_no_pred (void); +extern rtx get_tail_policy_no_pred (void); } /* We classify builtin types into two classes: |