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| author | Jürgen Urban <JuergenUrban@gmx.de> | 2013-06-16 09:16:23 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2013-06-16 09:16:23 +0000 |
| commit | b259d352ca69bed852c775145cdcd5d48bb45d1e (patch) | |
| tree | a4181b7ce69e1a7ceb5c0863499b71a9ebfbc83a | |
| parent | 6f9c34459e147040c95fbbab298183073b56ae63 (diff) | |
| download | gcc-b259d352ca69bed852c775145cdcd5d48bb45d1e.zip gcc-b259d352ca69bed852c775145cdcd5d48bb45d1e.tar.gz gcc-b259d352ca69bed852c775145cdcd5d48bb45d1e.tar.bz2 | |
mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900.
gcc/
2013-06-16 Jürgen Urban <JuergenUrban@gmx.de>
* config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900.
* config/mips/mips.c (mips_start_ll_sc_sync_block): Output
".set mips3" for 64-bit targets.
From-SVN: r200132
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 2 |
3 files changed, 11 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4a3546..3b3044f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-06-16 Jürgen Urban <JuergenUrban@gmx.de> + + * config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. + * config/mips/mips.c (mips_start_ll_sc_sync_block): Output + ".set mips3" for 64-bit targets. + 2013-06-15 Dehao Chen <dehao@google.com> * tree-flow.h (gimple_check_call_matching_types): Add new argument. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ff31644..bd1d10b 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -12463,7 +12463,10 @@ mips_start_ll_sc_sync_block (void) if (!ISA_HAS_LL_SC) { output_asm_insn (".set\tpush", 0); - output_asm_insn (".set\tmips2", 0); + if (TARGET_64BIT) + output_asm_insn (".set\tmips3", 0); + else + output_asm_insn (".set\tmips2", 0); } } diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 48a8b42..479bdd4 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1063,7 +1063,7 @@ struct mips_cpu_info { /* ISA includes ll and sc. Note that this implies ISA_HAS_SYNC because the expanders use both ISA_HAS_SYNC and ISA_HAS_LL_SC instructions. */ -#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16) +#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS5900 && !TARGET_MIPS16) #define GENERATE_LL_SC \ (target_flags_explicit & MASK_LLSC \ ? TARGET_LLSC && !TARGET_MIPS16 \ |