[multiple changes]

2002-02-20  David Edelsohn  <edelsohn@gnu.org>

        * config/rs6000/rs6000.h (EPILOGUE_USES): Conditionalize
        VRSAVE_REGNO on TARGET_ALTIVEC.

2002-02-20  Alan Modra  <amodra@bigpond.net.au>

        * config/rs6000/rs6000.c (includes_lshift_p): Mask irrelevant
        bits of SImode const_int.
        (includes_rshift_p): Likewise.
        (print_operand): Call mask_operand and mask64_operand with correct
        mode.
        (rs6000_output_function_epilogue): Pad traceback table to word.
        * config/rs6000/rs6000.h (MASK_64BIT): Correct comment.
        (EXTRA_CONSTRAINT, 'S' and 'T'): Call mask_operand and
        mask64_operand with correct mode.
        (RETURN_IN_MEMORY): Use HOST_WIDE_INT, not HOST_WIDEST_INT.
        (FUNCTION_ARG_REGNO_P): Correct parentheses.

From-SVN: r49923

3 files changed, 33 insertions, 12 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7abdd71..b937842 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,22 @@
+2002-02-20  David Edelsohn  <edelsohn@gnu.org>
+
+	* config/rs6000/rs6000.h (EPILOGUE_USES): Conditionalize
+	VRSAVE_REGNO on TARGET_ALTIVEC.
+
+2002-02-20  Alan Modra  <amodra@bigpond.net.au>
+
+	* config/rs6000/rs6000.c (includes_lshift_p): Mask irrelevant
+	bits of SImode const_int.
+	(includes_rshift_p): Likewise.
+	(print_operand): Call mask_operand and mask64_operand with correct
+	mode. 
+	(rs6000_output_function_epilogue): Pad traceback table to word.
+	* config/rs6000/rs6000.h (MASK_64BIT): Correct comment.
+	(EXTRA_CONSTRAINT, 'S' and 'T'): Call mask_operand and
+	mask64_operand with correct mode.
+	(RETURN_IN_MEMORY): Use HOST_WIDE_INT, not HOST_WIDEST_INT.
+	(FUNCTION_ARG_REGNO_P): Correct parentheses.
+
 2002-02-20  Jakub Jelinek  <jakub@redhat.com>
 
 	PR debug/4461
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 1b18020..9698b1f 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5703,7 +5703,7 @@ min_max_operator (op, mode)
 
 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
    mask required to convert the result of a rotate insn into a shift
-   left insn of SHIFTOP bits.  Both are known to be CONST_INT.  */
+   left insn of SHIFTOP bits.  Both are known to be SImode CONST_INT.  */
 
 int
 includes_lshift_p (shiftop, andop)
@@ -5714,7 +5714,7 @@ includes_lshift_p (shiftop, andop)
 
   shift_mask <<= INTVAL (shiftop);
 
-  return (INTVAL (andop) & ~shift_mask) == 0;
+  return (INTVAL (andop) & 0xffffffff & ~shift_mask) == 0;
 }
 
 /* Similar, but for right shift.  */
@@ -5728,7 +5728,7 @@ includes_rshift_p (shiftop, andop)
 
   shift_mask >>= INTVAL (shiftop);
 
-  return (INTVAL (andop) & ~shift_mask) == 0;
+  return (INTVAL (andop) & 0xffffffff & ~shift_mask) == 0;
 }
 
 /* Return 1 if ANDOP is a mask suitable for use with an rldic insn
@@ -6378,7 +6378,7 @@ print_operand (file, x, code)
 			    
     case 'm':
       /* MB value for a mask operand.  */
-      if (! mask_operand (x, VOIDmode))
+      if (! mask_operand (x, SImode))
 	output_operand_lossage ("invalid %%m value");
 
       val = INT_LOWPART (x);
@@ -6413,7 +6413,7 @@ print_operand (file, x, code)
 
     case 'M':
       /* ME value for a mask operand.  */
-      if (! mask_operand (x, VOIDmode))
+      if (! mask_operand (x, SImode))
 	output_operand_lossage ("invalid %%M value");
 
       val = INT_LOWPART (x);
@@ -6543,7 +6543,7 @@ print_operand (file, x, code)
       /* PowerPC64 mask position.  All 0's and all 1's are excluded.
 	 CONST_INT 32-bit mask is considered sign-extended so any
 	 transition must occur within the CONST_INT, not on the boundary.  */
-      if (! mask64_operand (x, VOIDmode))
+      if (! mask64_operand (x, DImode))
 	output_operand_lossage ("invalid %%S value");
 
       val = INT_LOWPART (x);
@@ -9636,6 +9636,8 @@ rs6000_output_function_epilogue (file, size)
 	 Only emit this if the alloca bit was set above.  */
       if (frame_pointer_needed)
 	fputs ("\t.byte 31\n", file);
+
+      fputs ("\t.align 2\n", file);
     }
   return;
 }
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 782e37d..9056cd6 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -191,7 +191,7 @@ extern int target_flags;
    function, and one less allocable register.  */
 #define MASK_MINIMAL_TOC	0x00000200
 
-/* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits.  */
+/* Nonzero for the 64bit model: longs and pointers are 64 bits.  */
 #define MASK_64BIT		0x00000400
 
 /* Disable use of FPRs.  */
@@ -1205,14 +1205,14 @@ enum reg_class
    'Q' means that is a memory operand that is just an offset from a reg.
    'R' is for AIX TOC entries.
    'S' is a constant that can be placed into a 64-bit mask operand
-   'T' is a consatnt that can be placed into a 32-bit mask operand
+   'T' is a constant that can be placed into a 32-bit mask operand
    'U' is for V.4 small data references.  */
 
 #define EXTRA_CONSTRAINT(OP, C)						\
   ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG	\
    : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP)		\
-   : (C) == 'S' ? mask64_operand (OP, VOIDmode)				\
-   : (C) == 'T' ? mask_operand (OP, VOIDmode)				\
+   : (C) == 'S' ? mask64_operand (OP, DImode)				\
+   : (C) == 'T' ? mask_operand (OP, SImode)				\
    : (C) == 'U' ? (DEFAULT_ABI == ABI_V4				\
 		   && small_data_operand (OP, GET_MODE (OP)))		\
    : 0)
@@ -1545,7 +1545,7 @@ typedef struct rs6000_stack {
    On RS/6000, these are r3-r10 and fp1-fp13.
    On AltiVec, v2 - v13 are used for passing vectors.  */
 #define FUNCTION_ARG_REGNO_P(N)						\
-  ((unsigned)(((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG))	\
+  (((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG))	\
    || (TARGET_ALTIVEC &&						\
        (unsigned)((N) - ALTIVEC_ARG_MIN_REG) < (unsigned)(ALTIVEC_ARG_NUM_REG)) \
    || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG)))
@@ -1742,7 +1742,7 @@ typedef struct rs6000_args
 
 #define	EPILOGUE_USES(REGNO)					\
   ((reload_completed && (REGNO) == LINK_REGISTER_REGNUM)	\
-   || (REGNO) == VRSAVE_REGNO					\
+   || (TARGET_ALTIVEC && (REGNO) == VRSAVE_REGNO)		\
    || (current_function_calls_eh_return				\
        && TARGET_AIX						\
        && (REGNO) == TOC_REGISTER))