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author | Doug Evans <dje@gnu.org> | 1997-07-22 23:42:22 +0000 |
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committer | Doug Evans <dje@gnu.org> | 1997-07-22 23:42:22 +0000 |
commit | b0967cadd59fd9a1f50e849e028ce244daf22c89 (patch) | |
tree | cedbc4af647f417235a2b372628f6d8c43b6c6d4 | |
parent | 31bc9eba585e7b705173fe4d7dfa552a452a0669 (diff) | |
download | gcc-b0967cadd59fd9a1f50e849e028ce244daf22c89.zip gcc-b0967cadd59fd9a1f50e849e028ce244daf22c89.tar.gz gcc-b0967cadd59fd9a1f50e849e028ce244daf22c89.tar.bz2 |
sparc.md (seqdi_special): Don't clobber %xcc.
* sparc/sparc.md (seqdi_special): Don't clobber %xcc.
(snedi_special, seqdi_special_trunc, snedi_special_trunc): Likewise.
(snedi_zero, neg_snedi_zero, seqdi_zero, neg_seqdi_zero): Likewise.
(snedi_zero_trunc, seqdi_zero_trunc): Likewise. Renamed from ..._sp64.
(snedi_zero_trunc_sp32, seqdi_zero_trunc_sp32): Delete.
From-SVN: r14520
-rw-r--r-- | gcc/config/sparc/sparc.md | 62 |
1 files changed, 16 insertions, 46 deletions
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index f81c224..9ac695f 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -474,9 +474,8 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (parallel [(set (match_operand:DI 0 "register_operand" "") - (eq:DI (match_dup 3) (const_int 0))) - (clobber (reg:CCX 100))])] + (set (match_operand:DI 0 "register_operand" "") + (eq:DI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" "{ operands[3] = gen_reg_rtx (DImode); }") @@ -494,9 +493,8 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (parallel [(set (match_operand:DI 0 "register_operand" "") - (ne:DI (match_dup 3) (const_int 0))) - (clobber (reg:CCX 100))])] + (set (match_operand:DI 0 "register_operand" "") + (ne:DI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" "{ operands[3] = gen_reg_rtx (DImode); }") @@ -504,9 +502,8 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (parallel [(set (match_operand:SI 0 "register_operand" "") - (eq:DI (match_dup 3) (const_int 0))) - (clobber (reg:CCX 100))])] + (set (match_operand:SI 0 "register_operand" "") + (eq:DI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" "{ operands[3] = gen_reg_rtx (DImode); }") @@ -514,9 +511,8 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (parallel [(set (match_operand:SI 0 "register_operand" "") - (ne:DI (match_dup 3) (const_int 0))) - (clobber (reg:CCX 100))])] + (set (match_operand:SI 0 "register_operand" "") + (ne:DI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" "{ operands[3] = gen_reg_rtx (DImode); }") @@ -860,8 +856,7 @@ (define_insn "*snedi_zero" [(set (match_operand:DI 0 "register_operand" "=&r") (ne:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] + (const_int 0)))] "TARGET_ARCH64" "mov 0,%0\;movrnz %1,1,%0" [(set_attr "type" "unary") @@ -870,28 +865,16 @@ (define_insn "*neg_snedi_zero" [(set (match_operand:DI 0 "register_operand" "=&r") (neg:DI (ne:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0)))) - (clobber (reg:CCX 100))] + (const_int 0))))] "TARGET_ARCH64" "mov 0,%0\;movrnz %1,-1,%0" [(set_attr "type" "unary") (set_attr "length" "2")]) -(define_insn "*snedi_zero_trunc_sp32" - [(set (match_operand:SI 0 "register_operand" "=r") - (ne:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] - "! TARGET_ARCH64 && ! TARGET_LIVE_G0" - "xor %1,%R1,%0\;subcc %%g0,%0,%%g0\;addx %%g0,0,%0" - [(set_attr "type" "unary") - (set_attr "length" "3")]) - -(define_insn "*snedi_zero_trunc_sp64" +(define_insn "*snedi_zero_trunc" [(set (match_operand:SI 0 "register_operand" "=&r") (ne:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] + (const_int 0)))] "TARGET_ARCH64" "mov 0,%0\;movrnz %1,1,%0" [(set_attr "type" "unary") @@ -930,8 +913,7 @@ (define_insn "*seqdi_zero" [(set (match_operand:DI 0 "register_operand" "=&r") (eq:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] + (const_int 0)))] "TARGET_ARCH64" "mov 0,%0\;movrz %1,1,%0" [(set_attr "type" "unary") @@ -940,28 +922,16 @@ (define_insn "*neg_seqdi_zero" [(set (match_operand:DI 0 "register_operand" "=&r") (neg:DI (eq:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0)))) - (clobber (reg:CCX 100))] + (const_int 0))))] "TARGET_ARCH64" "mov 0,%0\;movrz %1,-1,%0" [(set_attr "type" "unary") (set_attr "length" "2")]) -(define_insn "*seqdi_zero_trunc_sp32" - [(set (match_operand:SI 0 "register_operand" "=r") - (eq:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] - "! TARGET_ARCH64 && ! TARGET_LIVE_G0" - "xor %1,%R1,%0\;subcc %%g0,%0,%%g0\;subx %%g0,-1,%0" - [(set_attr "type" "unary") - (set_attr "length" "3")]) - -(define_insn "*seqdi_zero_trunc_sp64" +(define_insn "*seqdi_zero_trunc" [(set (match_operand:SI 0 "register_operand" "=&r") (eq:DI (match_operand:DI 1 "register_operand" "r") - (const_int 0))) - (clobber (reg:CCX 100))] + (const_int 0)))] "TARGET_ARCH64" "mov 0,%0\;movrz %1,1,%0" [(set_attr "type" "unary") |