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authorSameera Deshpande <sameera.deshpande@arm.com>2012-07-20 22:42:03 +0530
committerGreta Yorsh <gretay@gcc.gnu.org>2012-07-20 18:12:03 +0100
commitad05f87b4a6ab72f6fe3bd37ac5cea017f896aa9 (patch)
tree9833b09e6334d19eb838e0e9a3cb1004180f70c2
parentab3dfff71d064f29aee8216dddcc8b463554df8b (diff)
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arm.c (arm_cortex_a15_tune): New tune.
gcc/ 2012-07-20 Sameera Deshpande <sameera.deshpande@arm.com> Greta Yorsh <Greta.Yorsh@arm.com> * config/arm/arm.c (arm_cortex_a15_tune): New tune. * config/arm/arm-cores.def (cortex-a15): Use it. Co-Authored-By: Greta Yorsh <greta.yorsh@arm.com> From-SVN: r189723
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm-cores.def2
-rw-r--r--gcc/config/arm/arm.c12
3 files changed, 19 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ca05268..8de3f97 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,12 @@
2012-07-20 Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <Greta.Yorsh@arm.com>
+ * config/arm/arm.c (arm_cortex_a15_tune): New tune.
+ * config/arm/arm-cores.def (cortex-a15): Use it.
+
+2012-07-20 Sameera Deshpande <sameera.deshpande@arm.com>
+ Greta Yorsh <Greta.Yorsh@arm.com>
+
* config/arm/arm-protos.h (tune_params): Add prefer_ldrd_strd.
* config/arm/arm.c (arm_slowmul_tune): Initialize it.
(arm_fastmul_tune, arm_strongarm_tune): Likewise.
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 223e41f..9eb4262 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -129,7 +129,7 @@ ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5)
ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex)
ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
+ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d463caf..d5316fe 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -955,6 +955,18 @@ const struct tune_params arm_cortex_tune =
false /* Prefer LDRD/STRD. */
};
+const struct tune_params arm_cortex_a15_tune =
+{
+ arm_9e_rtx_costs,
+ NULL,
+ 1, /* Constant limit. */
+ 5, /* Max cond insns. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ false, /* Prefer constant pool. */
+ arm_default_branch_cost,
+ true /* Prefer LDRD/STRD. */
+};
+
/* Branches can be dual-issued on Cortex-A5, so conditional execution is
less appealing. Set max_insns_skipped to a low value. */