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| author | DJ Delorie <dj@redhat.com> | 2006-06-22 11:33:36 -0400 |
|---|---|---|
| committer | DJ Delorie <dj@gcc.gnu.org> | 2006-06-22 11:33:36 -0400 |
| commit | a1ec220c207cdee8a25aa00b335806f7e29405be (patch) | |
| tree | c353292acdefefa6077d26301bdf5e236128ee39 | |
| parent | 11343881d37cefc534b83b5aeebb69dadbd249ee (diff) | |
| download | gcc-a1ec220c207cdee8a25aa00b335806f7e29405be.zip gcc-a1ec220c207cdee8a25aa00b335806f7e29405be.tar.gz gcc-a1ec220c207cdee8a25aa00b335806f7e29405be.tar.bz2 | |
muldiv.md (mulhisi3_i): Only use registers for dest (TN-16C-A156A/E).
* config/m32c/muldiv.md (mulhisi3_i): Only use registers for dest
(TN-16C-A156A/E).
(mulhisi3_r): Likewise.
From-SVN: r114891
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/m32c/muldiv.md | 12 |
2 files changed, 12 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b8cd042..7880d15 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2006-06-21 DJ Delorie <dj@redhat.com> + + * config/m32c/muldiv.md (mulhisi3_i): Only use registers for dest + (TN-16C-A156A/E). + (mulhisi3_r): Likewise. + 2006-06-21 Richard Sandiford <richard@codesourcery.com> PR middle-end/28034 diff --git a/gcc/config/m32c/muldiv.md b/gcc/config/m32c/muldiv.md index 1719a79..9313088 100644 --- a/gcc/config/m32c/muldiv.md +++ b/gcc/config/m32c/muldiv.md @@ -80,18 +80,18 @@ ) (define_insn "mulhisi3_c" - [(set (match_operand:SI 0 "mra_operand" "=RsiSd,??Rmm") - (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0,0")) - (match_operand 2 "immediate_operand" "i,i")))] + [(set (match_operand:SI 0 "ra_operand" "=Rsi") + (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0")) + (match_operand 2 "immediate_operand" "i")))] "" "mul.w\t%2,%1" [(set_attr "flags" "o")] ) (define_insn "mulhisi3_r" - [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm") - (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0,0,0,0")) - (sign_extend:SI (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm,RhiSd,?Rmm"))))] + [(set (match_operand:SI 0 "mra_operand" "=Rsi,Rsi") + (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0,0")) + (sign_extend:SI (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm"))))] "" "mul.w\t%2,%1" [(set_attr "flags" "o")] |