target-supports.exp (check_effective_target_powerpc_spe_nocache): New function.

	* lib/target-supports.exp (check_effective_target_powerpc_spe_nocache):
	New function.
	* gcc.target/powerpc/20030218-1.c: Skip if not powerpc_spe_nocache
	and use consistent CFLAGS.
	* gcc.target/powerpc/20030505.c: Likewise.
	* gcc.target/powerpc/20081204-1.c: Likewise.
	* gcc.target/powerpc/ppc-spe.c: Likewise.
	* gcc.target/powerpc/spe1.c: Likewise.
	* g++.dg/ext/spe1.C: Likewise.
	* g++.dg/other/opaque-1.C: Likewise.
	* g++.dg/other/opaque-2.C: Likewise.
	* g++.dg/other/opaque-3.C: Likewise.

Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Nathan Froyd <froydnj@codesourcery.com>

From-SVN: r143379

12 files changed, 58 insertions, 13 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 57e8d9c..30441e6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2009-01-14  Daniel Jacobowitz  <dan@codesourcery.com>
+	    Nathan Froyd  <froydnj@codesourcery.com>
+	    Joseph Myers  <joseph@codesourcery.com>
+
+	* lib/target-supports.exp (check_effective_target_powerpc_spe_nocache):
+	New function.
+	* gcc.target/powerpc/20030218-1.c: Skip if not powerpc_spe_nocache
+	and use consistent CFLAGS.
+	* gcc.target/powerpc/20030505.c: Likewise.
+	* gcc.target/powerpc/20081204-1.c: Likewise.
+	* gcc.target/powerpc/ppc-spe.c: Likewise.
+	* gcc.target/powerpc/spe1.c: Likewise.
+	* g++.dg/ext/spe1.C: Likewise.
+	* g++.dg/other/opaque-1.C: Likewise.
+	* g++.dg/other/opaque-2.C: Likewise.
+	* g++.dg/other/opaque-3.C: Likewise.
+
 2009-01-14  Mark Mitchell  <mark@codesourcery.com>
 
 	* gcc.dg/vect/vect-105.c: Prevent compiler from hoisting abort
diff --git a/gcc/testsuite/g++.dg/ext/spe1.C b/gcc/testsuite/g++.dg/ext/spe1.C
index fdd2139..8b1e630 100644
--- a/gcc/testsuite/g++.dg/ext/spe1.C
+++ b/gcc/testsuite/g++.dg/ext/spe1.C
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 typedef int v2si __attribute__ ((vector_size (8)));
 
diff --git a/gcc/testsuite/g++.dg/other/opaque-1.C b/gcc/testsuite/g++.dg/other/opaque-1.C
index fa79f6f..5cdaeaf 100644
--- a/gcc/testsuite/g++.dg/other/opaque-1.C
+++ b/gcc/testsuite/g++.dg/other/opaque-1.C
@@ -1,4 +1,6 @@
-/* { dg-do run { target { powerpc*-*-* && powerpc_spe } } } */
+/* { dg-do run } */
+/* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 #define __vector __attribute__((vector_size(8)))
 typedef float __vector __ev64_fs__;
diff --git a/gcc/testsuite/g++.dg/other/opaque-2.C b/gcc/testsuite/g++.dg/other/opaque-2.C
index 6b13ba2..3bb4af2 100644
--- a/gcc/testsuite/g++.dg/other/opaque-2.C
+++ b/gcc/testsuite/g++.dg/other/opaque-2.C
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* powerpc*-*-linux*spe* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 #define __vector __attribute__((vector_size(8)))
 typedef float __vector __ev64_fs__;
diff --git a/gcc/testsuite/g++.dg/other/opaque-3.C b/gcc/testsuite/g++.dg/other/opaque-3.C
index cf8119f..5ece652 100644
--- a/gcc/testsuite/g++.dg/other/opaque-3.C
+++ b/gcc/testsuite/g++.dg/other/opaque-3.C
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* powerpc*-*-linux*spe* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 __ev64_opaque__ o;
 #define v __attribute__((vector_size(8)))
diff --git a/gcc/testsuite/gcc.target/powerpc/20030218-1.c b/gcc/testsuite/gcc.target/powerpc/20030218-1.c
index 024f637..2a1c4e6d 100644
--- a/gcc/testsuite/gcc.target/powerpc/20030218-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/20030218-1.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* } } */
-/* { dg-options "-mspe=yes -mfloat-gprs=single" } */
+/* { dg-do compile } */
+/* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 /* Test vectors that can interconvert without a cast.  */
 
@@ -19,7 +20,7 @@ main (void)
 
   /* Just because this is a V2SI, it doesn't make it an opaque.  */
   vint = vshort; /* { dg-message "note: use -flax-vector-conversions to permit conversions between vectors with differing element types or numbers of subparts" } */
-  /* { dg-error "incompatible types when assigning" "" { target *-*-* } 21 } */
+  /* { dg-error "incompatible types when assigning" "" { target *-*-* } 22 } */
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/20030505.c b/gcc/testsuite/gcc.target/powerpc/20030505.c
index a828393..2bef590 100644
--- a/gcc/testsuite/gcc.target/powerpc/20030505.c
+++ b/gcc/testsuite/gcc.target/powerpc/20030505.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* } } */
+/* { dg-do compile } */
 /* { dg-options "-W -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 #define __vector __attribute__((vector_size(8)))
 
diff --git a/gcc/testsuite/gcc.target/powerpc/20081204-1.c b/gcc/testsuite/gcc.target/powerpc/20081204-1.c
index ba4df8f..8a973d0 100644
--- a/gcc/testsuite/gcc.target/powerpc/20081204-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/20081204-1.c
@@ -2,6 +2,8 @@
    TARGET_HARD_FLOAT && !TARGET_FPRS.  */
 /* { dg-do compile } */
 /* { dg-options "-mcpu=750 -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
+
 static int comp(const void *a,const void *b){
   return (*(float *)a<*(float *)b)-(*(float *)a>*(float *)b);
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-spe.c b/gcc/testsuite/gcc.target/powerpc/ppc-spe.c
index 841073b..b564394 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-spe.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-spe.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 /* (Test with -O0 so we don't optimize any of them away).  */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c
index d12f669..09f8134 100644
--- a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c
+++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c
@@ -1,6 +1,6 @@
-/* { dg-do compile { target powerpc*-*-* } } */
-/* { dg-require-effective-target powerpc_spe } */
-/* { dg-options "-O -mspe=yes" } */
+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 /* { dg-final { scan-assembler "evstdd" } } */
 
 void foo(void)
diff --git a/gcc/testsuite/gcc.target/powerpc/spe1.c b/gcc/testsuite/gcc.target/powerpc/spe1.c
index 9803d8f..ddbb5a6 100644
--- a/gcc/testsuite/gcc.target/powerpc/spe1.c
+++ b/gcc/testsuite/gcc.target/powerpc/spe1.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target powerpc-*-eabi* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */
+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
 
 /* (Test with -O0 so we don't optimize any of them away).  */
 
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index af806be..aaefa60 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1535,6 +1535,23 @@ proc check_effective_target_powerpc_spu { } {
     }
 }
 
+# Return 1 if this is a PowerPC SPE target.  The check includes options
+# specified by dg-options for this test, so don't cache the result.
+
+proc check_effective_target_powerpc_spe_nocache { } {
+    if { [istarget powerpc*-*-*] } {
+	return [check_no_compiler_messages_nocache powerpc_spe object {
+	    #ifndef __SPE__
+	    #error not SPE
+	    #else
+	    int dummy;
+	    #endif
+	} [current_compiler_flags]]
+    } else {
+	return 0
+    }
+}
+
 # Return 1 if this is a PowerPC target with SPE enabled.
 
 proc check_effective_target_powerpc_spe { } {