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| author | Andrew Jenner <andrew@codesourcery.com> | 2018-02-06 16:10:43 +0000 |
|---|---|---|
| committer | Andrew Jenner <andrewjenner@gcc.gnu.org> | 2018-02-06 16:10:43 +0000 |
| commit | 95b7eb791371093da660fa88b1d03e6d6a4b9ddd (patch) | |
| tree | 02e4f3a47981378ce98123075886da5fe31ee14f | |
| parent | c068b2a51447d2eaf0f6cae45ea48d99e3f2685f (diff) | |
| download | gcc-95b7eb791371093da660fa88b1d03e6d6a4b9ddd.zip gcc-95b7eb791371093da660fa88b1d03e6d6a4b9ddd.tar.gz gcc-95b7eb791371093da660fa88b1d03e6d6a4b9ddd.tar.bz2 | |
powerpcspe.opt: (msimple-fpu, mfpu) Add Undocumented.
* config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add
Undocumented.
* config/powerpcspe/sysv4.opt (mbit-align): Likewise.
From-SVN: r257417
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/powerpcspe/powerpcspe.opt | 4 | ||||
| -rw-r--r-- | gcc/config/powerpcspe/sysv4.opt | 2 |
3 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f675bbf..b42a123 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-02-06 Andrew Jenner <andrew@codesourcery.com> + + * config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add + Undocumented. + * config/powerpcspe/sysv4.opt (mbit-align): Likewise. + 2018-02-06 Aldy Hernandez <aldyh@redhat.com> PR tree-optimization/84225 diff --git a/gcc/config/powerpcspe/powerpcspe.opt b/gcc/config/powerpcspe/powerpcspe.opt index 5a1632e..79c55bf 100644 --- a/gcc/config/powerpcspe/powerpcspe.opt +++ b/gcc/config/powerpcspe/powerpcspe.opt @@ -516,11 +516,11 @@ Target RejectNegative Var(rs6000_double_float) Save Double-precision floating point unit. msimple-fpu -Target RejectNegative Var(rs6000_simple_fpu) Save +Target Undocumented RejectNegative Var(rs6000_simple_fpu) Save Floating point unit does not support divide & sqrt. mfpu= -Target RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE) +Target Undocumented RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE) -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu). Enum diff --git a/gcc/config/powerpcspe/sysv4.opt b/gcc/config/powerpcspe/sysv4.opt index 9534c1c..b333c4a 100644 --- a/gcc/config/powerpcspe/sysv4.opt +++ b/gcc/config/powerpcspe/sysv4.opt @@ -44,7 +44,7 @@ EnumValue Enum(rs6000_tls_size) String(64) Value(64) mbit-align -Target Report Var(TARGET_NO_BITFIELD_TYPE) Save +Target Undocumented Report Var(TARGET_NO_BITFIELD_TYPE) Save Align to the base type of the bit-field. mstrict-align |