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| author | Richard Kenner <kenner@gcc.gnu.org> | 1994-11-11 14:15:49 -0500 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1994-11-11 14:15:49 -0500 |
| commit | 924f3f28d39adf56d3b2dcf706fc91e6710070c5 (patch) | |
| tree | a20abb6b0f20d68022fad8a8f62c46d14b41ff0a | |
| parent | a205e34b227a13e890ab1071f956799906cfe689 (diff) | |
| download | gcc-924f3f28d39adf56d3b2dcf706fc91e6710070c5.zip gcc-924f3f28d39adf56d3b2dcf706fc91e6710070c5.tar.gz gcc-924f3f28d39adf56d3b2dcf706fc91e6710070c5.tar.bz2 | |
(movsi+1): Allow r->m move during reloading.
From-SVN: r8424
| -rw-r--r-- | gcc/config/clipper/clipper.md | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md index ed9de8d..50104bf 100644 --- a/gcc/config/clipper/clipper.md +++ b/gcc/config/clipper/clipper.md @@ -385,14 +385,19 @@ operands[1] = force_reg (SImode, operands[1]); }") -;; provide 2 patterns with different predicates as 'general_operand' in both -;; positions results in a 'mem -> mem' move from combine that must be reloaded +;; Reject both args with `general_operand' if not reloading because a +;; mem -> mem move that was split by 'movsi' can be recombined to +;; mem -> mem by the combiner. ;; - +;; As a pseudo register can end up in a stack slot during reloading we must +;; allow a r->m move for the next pattern. +;; The first predicate must be `general_operand' because a predicate must +;; be true for each constraint. +;; (define_insn "" - [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") - (match_operand:SI 1 "general_operand" "r,m,n,i"))] - "" + [(set (match_operand:SI 0 "general_operand" "=r,r,r,r,m") + (match_operand:SI 1 "general_operand" "r,m,n,i,r"))] + "reload_in_progress || register_operand (operands[0], SImode)" "* { int val; @@ -418,9 +423,11 @@ if (which_alternative == 3) /* unknown const */ return \"loada %a1,%0\"; + + return \"storw %1,%0\"; }" -[(set_attr "type" "arith,load,arith,load") - (set_attr "cc" "set2,change0,set1,change0")]) +[(set_attr "type" "arith,load,arith,load,store") + (set_attr "cc" "set2,change0,set1,change0,unchanged")]) (define_insn "" |