diff options
author | Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com> | 2023-06-30 12:28:45 +0100 |
---|---|---|
committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-06-30 12:28:45 +0100 |
commit | 900945f663295aab273d139f018528b321f94d10 (patch) | |
tree | ae24158db50851d48069074f62d775fd50c47ce7 | |
parent | aec90c8bf30cbd66e4febae2c78622dc217f3918 (diff) | |
download | gcc-900945f663295aab273d139f018528b321f94d10.zip gcc-900945f663295aab273d139f018528b321f94d10.tar.gz gcc-900945f663295aab273d139f018528b321f94d10.tar.bz2 |
AArch64: New RTL for ABDL
This patch adds new RTL for ABDL (sabdl, sabdl2, uabdl, uabdl2).
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md
(vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
Expansions for abd vec widen optabs.
(aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
* config/aarch64/iterators.md (USMAX_EXT): Code attributes
that give the appropriate extend RTL for the max RTL.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/abd_2.c: Added ABDL testcases.
* gcc.target/aarch64/abd_3.c: Added ABDL testcases.
* gcc.target/aarch64/abd_4.c: Added ABDL testcases.
* gcc.target/aarch64/abd_none_2.c: Added ABDL testcases.
* gcc.target/aarch64/abd_none_3.c: Added ABDL testcases.
* gcc.target/aarch64/abd_none_4.c: Added ABDL testcases.
* gcc.target/aarch64/abd_run_1.c: Added ABDL testcases.
* gcc.target/aarch64/sve/abd_1.c: Added ABDL testcases.
* gcc.target/aarch64/sve/abd_2.c: Added ABDL testcases.
* gcc.target/aarch64/sve/abd_none_1.c: Added ABDL testcases.
* gcc.target/aarch64/sve/abd_none_2.c: Added ABDL testcases.
-rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 60 | ||||
-rw-r--r-- | gcc/config/aarch64/iterators.md | 3 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_2.c | 45 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_3.c | 46 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_4.c | 34 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_none_2.c | 73 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_none_3.c | 73 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_none_4.c | 84 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_run_1.c | 29 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_widen_2.c | 50 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_widen_3.c | 50 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/abd_widen_4.c | 56 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/abd_1.c | 57 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/abd_2.c | 47 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c | 73 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c | 80 |
16 files changed, 803 insertions, 57 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 4052ca9..f1687d9 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -975,6 +975,66 @@ } ) +(define_insn "aarch64_<su>abdl<mode>_hi_internal" + [(set (match_operand:<VWIDE> 0 "register_operand" "=w") + (abs:<VWIDE> + (minus:<VWIDE> + (ANY_EXTEND:<VWIDE> + (vec_select:<VHALF> + (match_operand:VQW 1 "register_operand" "w") + (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) + (ANY_EXTEND:<VWIDE> + (vec_select:<VHALF> + (match_operand:VQW 2 "register_operand" "w") + (match_dup 3))))))] + "TARGET_SIMD" + "<su>abdl2\t%0.<Vwtype>, %1.<Vtype>, %2.<Vtype>" + [(set_attr "type" "neon_abd_long")] +) + +(define_insn "aarch64_<su>abdl<mode>_lo_internal" + [(set (match_operand:<VWIDE> 0 "register_operand" "=w") + (abs:<VWIDE> + (minus:<VWIDE> + (ANY_EXTEND:<VWIDE> + (vec_select:<VHALF> + (match_operand:VQW 1 "register_operand" "w") + (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) + (ANY_EXTEND:<VWIDE> + (vec_select:<VHALF> + (match_operand:VQW 2 "register_operand" "w") + (match_dup 3))))))] + "TARGET_SIMD" + "<su>abdl\t%0.<Vwtype>, %1.<Vhalftype>, %2.<Vhalftype>" + [(set_attr "type" "neon_abd_long")] +) + +(define_expand "vec_widen_<su>abd_hi_<mode>" + [(match_operand:<VWIDE> 0 "register_operand") + (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand")) + (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand"))] + "TARGET_SIMD" + { + rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true); + emit_insn (gen_aarch64_<su>abdl<mode>_hi_internal (operands[0], operands[1], + operands[2], p)); + DONE; + } +) + +(define_expand "vec_widen_<su>abd_lo_<mode>" + [(match_operand:<VWIDE> 0 "register_operand") + (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand")) + (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand"))] + "TARGET_SIMD" + { + rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false); + emit_insn (gen_aarch64_<su>abdl<mode>_lo_internal (operands[0], operands[1], + operands[2], p)); + DONE; + } +) + (define_insn "aarch64_<su>abal<mode>" [(set (match_operand:<VWIDE> 0 "register_operand" "=w") (plus:<VWIDE> diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 7f9a512..9398d71 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -1984,6 +1984,9 @@ ;; Same as above, but louder. (define_code_attr MAX_OPP [(smax "SMIN") (umax "UMIN")]) +;; Map smax and umax to sign_extend and zero_extend +(define_code_attr USMAX_EXT [(smax "sign_extend") (umax "zero_extend")]) + ;; The number of subvectors in an SVE_STRUCT. (define_mode_attr vector_count [(VNx32QI "2") (VNx16HI "2") (VNx8SI "2") (VNx4DI "2") diff --git a/gcc/testsuite/gcc.target/aarch64/abd_2.c b/gcc/testsuite/gcc.target/aarch64/abd_2.c index c0d41fb..02256c0 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_2.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_2.c @@ -11,25 +11,46 @@ TEST1(signed, int) TEST1(signed, short) TEST1(signed, char) -TEST2(signed, char, short) -TEST2(signed, char, int) -TEST2(signed, short, int) +TEST2(signed, short, char) +TEST2(signed, int, short) +TEST2(signed, int, char) +TEST2(signed, int, long) +TEST3(signed, char, short, char) +TEST3(signed, char, int, long) TEST3(signed, char, int, short) -TEST3(signed, char, short, int) +TEST3(signed, char, int, char) + +TEST3(signed, short, int, char) +TEST3(signed, short, char, short) +TEST3(signed, short, int, short) +TEST3(signed, short, int, long) + +TEST3(signed, int, char, short) +TEST3(signed, int, short, char) +TEST3(signed, int, char, int) +TEST3(signed, int, short, int) +TEST3(signed, int, char, long) +TEST3(signed, int, short, long) TEST1(unsigned, short) TEST1(unsigned, char) -TEST2(unsigned, char, short) -TEST2(unsigned, char, int) +TEST2(unsigned, short, char) + +TEST3(unsigned, char, short, char) +TEST3(unsigned, short, char, short) -TEST3(unsigned, char, short, int) +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 48 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 7 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 5 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 4 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 7 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_3.c b/gcc/testsuite/gcc.target/aarch64/abd_3.c index 4873c64..cc601ac 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_3.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_3.c @@ -11,26 +11,46 @@ TEST1(signed, int) TEST1(signed, short) TEST1(signed, char) -TEST2(signed, char, short) -TEST2(signed, char, int) -TEST2(signed, short, int) +TEST2(signed, short, char) +TEST2(signed, int, short) +TEST2(signed, int, char) +TEST2(signed, int, long) +TEST3(signed, char, short, char) +TEST3(signed, char, int, long) TEST3(signed, char, int, short) -TEST3(signed, char, short, int) +TEST3(signed, char, int, char) + +TEST3(signed, short, int, char) +TEST3(signed, short, char, short) +TEST3(signed, short, int, short) +TEST3(signed, short, int, long) + +TEST3(signed, int, char, short) +TEST3(signed, int, short, char) +TEST3(signed, int, char, int) +TEST3(signed, int, short, int) +TEST3(signed, int, char, long) +TEST3(signed, int, short, long) TEST1(unsigned, short) TEST1(unsigned, char) -TEST2(unsigned, char, short) -TEST2(unsigned, char, int) -TEST2(unsigned, short, int) +TEST2(unsigned, short, char) + +TEST3(unsigned, char, short, char) +TEST3(unsigned, short, char, short) -TEST3(unsigned, char, short, int) +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 48 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 7 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 5 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 4 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 4 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 7 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_4.c b/gcc/testsuite/gcc.target/aarch64/abd_4.c index 98aa730..9e078f1 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_4.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_4.c @@ -9,22 +9,20 @@ TEST1(signed, int) -TEST2(signed, char, short) -TEST2(signed, char, int) -TEST2(signed, short, int) - -TEST3(signed, char, short, int) - -TEST2(unsigned, char, short) -TEST2(unsigned, char, int) -TEST2(unsigned, short, int) - -TEST3(unsigned, char, short, int) - -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 3 } } */ -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 2 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 2 } } */ - +TEST3(signed, int, char, int) +TEST3(signed, int, short, int) + +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 7 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 0 } } */ +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 0 } } */ + +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 0:w + } } */ + +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_2.c b/gcc/testsuite/gcc.target/aarch64/abd_none_2.c index 658e742..d7ef2c1 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_none_2.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_2.c @@ -7,8 +7,81 @@ #define ABD_ABS #include "abd.h" +TEST1(signed, long) + +TEST2(signed, long, char) +TEST2(signed, long, short) +TEST2(signed, long, int) + +TEST3(signed, char, long, short) +TEST3(signed, char, long, int) +TEST3(signed, char, long, char) + +TEST3(signed, short, long, char) +TEST3(signed, short, long, int) +TEST3(signed, short, long, short) + +TEST3(signed, int, long, char) +TEST3(signed, int, long, short) +TEST3(signed, int, long, int) + +TEST3(signed, long, char, short) +TEST3(signed, long, short, char) +TEST3(signed, long, char, int) +TEST3(signed, long, int, char) +TEST3(signed, long, short, int) +TEST3(signed, long, int, short) +TEST3(signed, long, char, long) +TEST3(signed, long, short, long) +TEST3(signed, long, int, long) + TEST1(unsigned, int) +TEST1(unsigned, long) + +TEST2(unsigned, int, long) + +TEST2(unsigned, long, char) +TEST2(unsigned, long, short) +TEST2(unsigned, long, int) +TEST2(unsigned, int, short) +TEST2(unsigned, int, char) + TEST3(unsigned, char, int, short) +TEST3(unsigned, char, long, short) +TEST3(unsigned, char, int, long) +TEST3(unsigned, char, long, int) +TEST3(unsigned, char, int, char) + +TEST3(unsigned, short, int, char) +TEST3(unsigned, short, long, char) +TEST3(unsigned, short, int, long) +TEST3(unsigned, short, long, int) +TEST3(unsigned, short, int, short) +TEST3(unsigned, short, long, short) + +TEST3(unsigned, int, char, short) +TEST3(unsigned, int, short, char) +TEST3(unsigned, int, char, long) +TEST3(unsigned, int, long, char) +TEST3(unsigned, int, short, long) +TEST3(unsigned, int, long, short) +TEST3(unsigned, int, char, int) +TEST3(unsigned, int, short, int) +TEST3(unsigned, int, long, int) + +TEST3(unsigned, long, char, short) +TEST3(unsigned, long, short, char) +TEST3(unsigned, long, char, int) +TEST3(unsigned, long, int, char) +TEST3(unsigned, long, short, int) +TEST3(unsigned, long, int, short) +TEST3(unsigned, long, char, long) +TEST3(unsigned, long, short, long) +TEST3(unsigned, long, int, long) /* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_3.c b/gcc/testsuite/gcc.target/aarch64/abd_none_3.c index 14cfdcb..f23dd7d 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_none_3.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_3.c @@ -7,8 +7,81 @@ #define ABD_ABS #include "abd.h" +TEST1(signed, long) + +TEST2(signed, long, char) +TEST2(signed, long, short) +TEST2(signed, long, int) + +TEST3(signed, char, long, short) +TEST3(signed, char, long, int) +TEST3(signed, char, long, char) + +TEST3(signed, short, long, char) +TEST3(signed, short, long, int) +TEST3(signed, short, long, short) + +TEST3(signed, int, long, char) +TEST3(signed, int, long, short) +TEST3(signed, int, long, int) + +TEST3(signed, long, char, short) +TEST3(signed, long, short, char) +TEST3(signed, long, char, int) +TEST3(signed, long, int, char) +TEST3(signed, long, short, int) +TEST3(signed, long, int, short) +TEST3(signed, long, char, long) +TEST3(signed, long, short, long) +TEST3(signed, long, int, long) + TEST1(unsigned, int) +TEST1(unsigned, long) + +TEST2(unsigned, int, long) + +TEST2(unsigned, long, char) +TEST2(unsigned, long, short) +TEST2(unsigned, long, int) +TEST2(unsigned, int, short) +TEST2(unsigned, int, char) + TEST3(unsigned, char, int, short) +TEST3(unsigned, char, long, short) +TEST3(unsigned, char, int, long) +TEST3(unsigned, char, long, int) +TEST3(unsigned, char, int, char) + +TEST3(unsigned, short, int, char) +TEST3(unsigned, short, long, char) +TEST3(unsigned, short, int, long) +TEST3(unsigned, short, long, int) +TEST3(unsigned, short, int, short) +TEST3(unsigned, short, long, short) + +TEST3(unsigned, int, char, short) +TEST3(unsigned, int, short, char) +TEST3(unsigned, int, char, long) +TEST3(unsigned, int, long, char) +TEST3(unsigned, int, short, long) +TEST3(unsigned, int, long, short) +TEST3(unsigned, int, char, int) +TEST3(unsigned, int, short, int) +TEST3(unsigned, int, long, int) + +TEST3(unsigned, long, char, short) +TEST3(unsigned, long, short, char) +TEST3(unsigned, long, char, int) +TEST3(unsigned, long, int, char) +TEST3(unsigned, long, short, int) +TEST3(unsigned, long, int, short) +TEST3(unsigned, long, char, long) +TEST3(unsigned, long, short, long) +TEST3(unsigned, long, int, long) /* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_4.c b/gcc/testsuite/gcc.target/aarch64/abd_none_4.c index d612216..f5cfc5d 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_none_4.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_4.c @@ -9,14 +9,98 @@ TEST1(signed, short) TEST1(signed, char) +TEST1(signed, long) + +TEST2(signed, long, char) +TEST2(signed, long, short) +TEST2(signed, long, int) +TEST2(signed, int, short) +TEST2(signed, int, char) +TEST2(signed, short, char) TEST3(signed, char, int, short) +TEST3(signed, char, long, short) +TEST3(signed, char, long, int) +TEST3(signed, char, short, char) +TEST3(signed, char, int, char) +TEST3(signed, char, long, char) + +TEST3(signed, short, int, char) +TEST3(signed, short, long, char) +TEST3(signed, short, long, int) +TEST3(signed, short, char, short) +TEST3(signed, short, int, short) +TEST3(signed, short, long, short) + +TEST3(signed, int, char, short) +TEST3(signed, int, short, char) +TEST3(signed, int, long, char) +TEST3(signed, int, long, short) +TEST3(signed, int, long, int) + +TEST3(signed, long, char, short) +TEST3(signed, long, short, char) +TEST3(signed, long, char, int) +TEST3(signed, long, int, char) +TEST3(signed, long, short, int) +TEST3(signed, long, int, short) +TEST3(signed, long, char, long) +TEST3(signed, long, short, long) +TEST3(signed, long, int, long) TEST1(unsigned, int) TEST1(unsigned, short) TEST1(unsigned, char) +TEST1(unsigned, long) + +TEST2(unsigned, int, long) + +TEST2(unsigned, long, char) +TEST2(unsigned, long, short) +TEST2(unsigned, long, int) +TEST2(unsigned, int, short) +TEST2(unsigned, int, char) +TEST2(unsigned, short, char) TEST3(unsigned, char, int, short) +TEST3(unsigned, char, long, short) +TEST3(unsigned, char, int, long) +TEST3(unsigned, char, long, int) +TEST3(unsigned, char, short, char) +TEST3(unsigned, char, int, char) +TEST3(unsigned, char, long, char) + +TEST3(unsigned, short, int, char) +TEST3(unsigned, short, long, char) +TEST3(unsigned, short, int, long) +TEST3(unsigned, short, long, int) +TEST3(unsigned, short, char, short) +TEST3(unsigned, short, int, short) +TEST3(unsigned, short, long, short) + +TEST3(unsigned, int, char, short) +TEST3(unsigned, int, short, char) +TEST3(unsigned, int, char, long) +TEST3(unsigned, int, long, char) +TEST3(unsigned, int, short, long) +TEST3(unsigned, int, long, short) +TEST3(unsigned, int, char, int) +TEST3(unsigned, int, short, int) +TEST3(unsigned, int, long, int) + +TEST3(unsigned, long, char, short) +TEST3(unsigned, long, short, char) +TEST3(unsigned, long, char, int) +TEST3(unsigned, long, int, char) +TEST3(unsigned, long, short, int) +TEST3(unsigned, long, int, short) +TEST3(unsigned, long, char, long) +TEST3(unsigned, long, short, long) +TEST3(unsigned, long, int, long) /* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_run_1.c b/gcc/testsuite/gcc.target/aarch64/abd_run_1.c index 7bb0a80..1bfd6ac 100644 --- a/gcc/testsuite/gcc.target/aarch64/abd_run_1.c +++ b/gcc/testsuite/gcc.target/aarch64/abd_run_1.c @@ -11,10 +11,17 @@ TEST1(signed, int) TEST1(signed, short) TEST1(signed, char) +TEST2(signed, char, short) +TEST2(signed, short, int) +TEST2(signed, int, long) + TEST1(unsigned, int) TEST1(unsigned, short) TEST1(unsigned, char) +TEST2(unsigned, char, short) +TEST2(unsigned, short, int) + #define EMPTY { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } #define sA { -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50 } #define uA { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 } @@ -27,6 +34,8 @@ typedef signed short s16; typedef unsigned short u16; typedef signed int s32; typedef unsigned int u32; +typedef signed long s64; +typedef unsigned long u64; s8 sc_out[] = EMPTY; u8 uc_out[] = EMPTY; @@ -34,6 +43,8 @@ s16 ss_out[] = EMPTY; u16 us_out[] = EMPTY; s32 si_out[] = EMPTY; u32 ui_out[] = EMPTY; +s64 sl_out[] = EMPTY; +u64 ul_out[] = EMPTY; s8 sc_A[] = sA; s8 sc_B[] = B; @@ -56,6 +67,8 @@ s16 ss_gold[] = GOLD; u16 us_gold[] = GOLD; s32 si_gold[] = GOLD; u32 ui_gold[] = GOLD; +s64 sl_gold[] = GOLD; +u64 ul_gold[] = GOLD; extern void abort (void); @@ -88,6 +101,22 @@ int main () fn_unsigned_int (ui_A, ui_B, ui_out); COMPARE (ui_out, ui_gold); + + fn_signed_char_char_short (sc_B, sc_A, ss_out); + COMPARE(ss_gold, ss_out); + + fn_signed_short_short_int (ss_A, ss_B, si_out); + COMPARE(si_gold, si_out); + + fn_signed_int_int_long (si_B, si_A, sl_out); + COMPARE(sl_gold, sl_out); + + fn_unsigned_char_char_short (uc_B, uc_A, us_out); + COMPARE(us_gold, us_out); + + fn_unsigned_short_short_int (us_A, us_B, ui_out); + COMPARE(ui_gold, ui_out); + return 0; } diff --git a/gcc/testsuite/gcc.target/aarch64/abd_widen_2.c b/gcc/testsuite/gcc.target/aarch64/abd_widen_2.c new file mode 100644 index 0000000..1be1e40 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/abd_widen_2.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +#pragma GCC target "+nosve" +#define N 1024 + +#define ABD_ABS +#include "abd.h" + +TEST2(signed, char, short) +TEST2(signed, char, int) +TEST2(signed, char, long) +TEST2(signed, short, int) +TEST2(signed, short, long) + +TEST3(signed, char, short, int) +TEST3(signed, char, short, long) + +TEST3(signed, short, char, int) +TEST3(signed, short, char, long) + +TEST2(unsigned, char, short) +TEST2(unsigned, char, int) +TEST2(unsigned, char, long) +TEST2(unsigned, short, int) +TEST2(unsigned, short, long) + +TEST3(unsigned, char, short, int) +TEST3(unsigned, char, short, long) + +TEST3(unsigned, short, char, int) +TEST3(unsigned, short, char, long) + +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 0 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_widen_3.c b/gcc/testsuite/gcc.target/aarch64/abd_widen_3.c new file mode 100644 index 0000000..ff6ee8f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/abd_widen_3.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-Ofast" } */ + +#pragma GCC target "arch=armv8-a" +#define N 1024 + +#define ABD_ABS +#include "abd.h" + +TEST2(signed, char, short) +TEST2(signed, char, int) +TEST2(signed, char, long) +TEST2(signed, short, int) +TEST2(signed, short, long) + +TEST3(signed, char, short, int) +TEST3(signed, char, short, long) + +TEST3(signed, short, char, int) +TEST3(signed, short, char, long) + +TEST2(unsigned, char, short) +TEST2(unsigned, char, int) +TEST2(unsigned, char, long) +TEST2(unsigned, short, int) +TEST2(unsigned, short, long) + +TEST3(unsigned, char, short, int) +TEST3(unsigned, char, short, long) + +TEST3(unsigned, short, char, int) +TEST3(unsigned, short, char, long) + +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 0 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/abd_widen_4.c b/gcc/testsuite/gcc.target/aarch64/abd_widen_4.c new file mode 100644 index 0000000..298b1c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/abd_widen_4.c @@ -0,0 +1,56 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +#pragma GCC target "+nosve" +#define N 1024 + +#define ABD_IDIOM +#include "abd.h" + +TEST2(signed, char, short) +TEST2(signed, char, int) +TEST2(signed, char, long) +TEST2(signed, short, int) +TEST2(signed, short, long) +TEST2(signed, int, long) + +TEST3(signed, char, short, int) +TEST3(signed, char, short, long) +TEST3(signed, char, int, long) + +TEST3(signed, short, char, int) +TEST3(signed, short, char, long) +TEST3(signed, short, int, long) + +TEST3(signed, int, char, long) +TEST3(signed, int, short, long) + +TEST2(unsigned, char, short) +TEST2(unsigned, char, int) +TEST2(unsigned, char, long) +TEST2(unsigned, short, int) +TEST2(unsigned, short, long) + +TEST3(unsigned, char, short, int) +TEST3(unsigned, char, short, long) + +TEST3(unsigned, short, char, int) +TEST3(unsigned, short, char, long) + +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 13 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 13 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 0 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 10 } } */ +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */ +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */ + +/* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c b/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c index e49006f..4f48240 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c @@ -10,26 +10,69 @@ TEST1(signed, int) TEST1(signed, short) TEST1(signed, char) -TEST2(signed, char, int) TEST2(signed, char, short) +TEST2(signed, char, int) +TEST2(signed, char, long) TEST2(signed, short, int) +TEST2(signed, short, long) +TEST2(signed, int, long) + +TEST2(signed, int, short) +TEST2(signed, int, char) +TEST2(signed, short, char) -TEST3(signed, char, int, short) TEST3(signed, char, short, int) +TEST3(signed, char, int, short) +TEST3(signed, char, short, long) +TEST3(signed, char, int, long) +TEST3(signed, char, short, char) +TEST3(signed, char, int, char) + +TEST3(signed, short, char, int) +TEST3(signed, short, int, char) +TEST3(signed, short, char, long) +TEST3(signed, short, int, long) +TEST3(signed, short, char, short) +TEST3(signed, short, int, short) + +TEST3(signed, int, char, short) +TEST3(signed, int, short, char) +TEST3(signed, int, char, long) +TEST3(signed, int, short, long) +TEST3(signed, int, char, int) +TEST3(signed, int, short, int) TEST1(unsigned, short) TEST1(unsigned, char) TEST2(unsigned, char, short) TEST2(unsigned, char, int) +TEST2(unsigned, char, long) TEST2(unsigned, short, int) +TEST2(unsigned, short, long) + +TEST2(unsigned, short, char) TEST3(unsigned, char, short, int) +TEST3(unsigned, char, short, long) +TEST3(unsigned, char, short, char) + +TEST3(unsigned, short, char, int) +TEST3(unsigned, short, char, long) +TEST3(unsigned, short, char, short) + +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z\[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 16 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 10 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 4 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 2 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 3 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 3 } } */ -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z\[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 10 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 4 } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c b/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c index ea64fa8..ffa978a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c @@ -7,23 +7,56 @@ #include "../abd.h" TEST1(signed, int) +TEST1(signed, long) -TEST2(signed, char, int) TEST2(signed, char, short) +TEST2(signed, char, int) +TEST2(signed, char, long) TEST2(signed, short, int) +TEST2(signed, short, long) +TEST2(signed, int, long) TEST3(signed, char, short, int) +TEST3(signed, char, short, long) +TEST3(signed, char, int, long) + +TEST3(signed, short, char, int) +TEST3(signed, short, char, long) +TEST3(signed, short, int, long) + +TEST3(signed, int, char, long) +TEST3(signed, int, short, long) +TEST3(signed, int, char, int) +TEST3(signed, int, short, int) + +TEST3(signed, long, char, long) +TEST3(signed, long, short, long) +TEST3(signed, long, int, long) -TEST2(unsigned, char, int) TEST2(unsigned, char, short) +TEST2(unsigned, char, int) +TEST2(unsigned, char, long) TEST2(unsigned, short, int) +TEST2(unsigned, short, long) TEST3(unsigned, char, short, int) +TEST3(unsigned, char, short, long) + +TEST3(unsigned, short, char, int) +TEST3(unsigned, short, char, long) + +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z\[0-9\]+\.d, z\[0-9\]+\.d" 4 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 8 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 6 } } */ +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 1 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 2 } } */ -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 2 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z\[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z\[0-9\]+\.s, z\[0-9\]+\.s" 0 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z\[0-9\]+\.h, z\[0-9\]+\.h" 6 } } */ +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z\[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tabs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c index a4c2053c..1fb58b3 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c @@ -6,8 +6,81 @@ #define ABD_ABS #include "../abd.h" +TEST1(signed, long) + +TEST2(signed, long, char) +TEST2(signed, long, short) +TEST2(signed, long, int) + +TEST3(signed, char, long, short) +TEST3(signed, char, long, int) +TEST3(signed, char, long, char) + +TEST3(signed, short, long, char) +TEST3(signed, short, long, int) +TEST3(signed, short, long, short) + +TEST3(signed, int, long, char) +TEST3(signed, int, long, short) +TEST3(signed, int, long, int) + +TEST3(signed, long, char, short) +TEST3(signed, long, short, char) +TEST3(signed, long, char, int) +TEST3(signed, long, int, char) +TEST3(signed, long, short, int) +TEST3(signed, long, int, short) +TEST3(signed, long, char, long) +TEST3(signed, long, short, long) +TEST3(signed, long, int, long) + TEST1(unsigned, int) +TEST1(unsigned, long) + +TEST2(unsigned, int, long) + +TEST2(unsigned, long, char) +TEST2(unsigned, long, short) +TEST2(unsigned, long, int) +TEST2(unsigned, int, short) +TEST2(unsigned, int, char) + TEST3(unsigned, char, int, short) +TEST3(unsigned, char, long, short) +TEST3(unsigned, char, int, long) +TEST3(unsigned, char, long, int) +TEST3(unsigned, char, int, char) + +TEST3(unsigned, short, int, char) +TEST3(unsigned, short, long, char) +TEST3(unsigned, short, int, long) +TEST3(unsigned, short, long, int) +TEST3(unsigned, short, int, short) +TEST3(unsigned, short, long, short) + +TEST3(unsigned, int, char, short) +TEST3(unsigned, int, short, char) +TEST3(unsigned, int, char, long) +TEST3(unsigned, int, long, char) +TEST3(unsigned, int, short, long) +TEST3(unsigned, int, long, short) +TEST3(unsigned, int, char, int) +TEST3(unsigned, int, short, int) +TEST3(unsigned, int, long, int) + +TEST3(unsigned, long, char, short) +TEST3(unsigned, long, short, char) +TEST3(unsigned, long, char, int) +TEST3(unsigned, long, int, char) +TEST3(unsigned, long, short, int) +TEST3(unsigned, long, int, short) +TEST3(unsigned, long, char, long) +TEST3(unsigned, long, short, long) +TEST3(unsigned, long, int, long) /* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c index 4862db9..a9465b5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c @@ -9,13 +9,93 @@ TEST1(signed, short) TEST1(signed, char) +TEST2(signed, long, char) +TEST2(signed, long, short) +TEST2(signed, long, int) +TEST2(signed, int, short) +TEST2(signed, int, char) +TEST2(signed, short, char) + TEST3(signed, char, int, short) +TEST3(signed, char, long, short) +TEST3(signed, char, long, int) +TEST3(signed, char, short, char) +TEST3(signed, char, int, char) +TEST3(signed, char, long, char) + +TEST3(signed, short, int, char) +TEST3(signed, short, long, char) +TEST3(signed, short, long, int) +TEST3(signed, short, char, short) +TEST3(signed, short, int, short) +TEST3(signed, short, long, short) + +TEST3(signed, int, char, short) +TEST3(signed, int, short, char) +TEST3(signed, int, long, char) +TEST3(signed, int, long, short) +TEST3(signed, int, long, int) + +TEST3(signed, long, char, short) +TEST3(signed, long, short, char) +TEST3(signed, long, char, int) +TEST3(signed, long, int, char) +TEST3(signed, long, short, int) +TEST3(signed, long, int, short) TEST1(unsigned, int) TEST1(unsigned, short) TEST1(unsigned, char) +TEST1(unsigned, long) + +TEST2(unsigned, int, long) + +TEST2(unsigned, long, char) +TEST2(unsigned, long, short) +TEST2(unsigned, long, int) +TEST2(unsigned, int, short) +TEST2(unsigned, int, char) +TEST2(unsigned, short, char) TEST3(unsigned, char, int, short) +TEST3(unsigned, char, long, short) +TEST3(unsigned, char, int, long) +TEST3(unsigned, char, long, int) +TEST3(unsigned, char, short, char) +TEST3(unsigned, char, int, char) +TEST3(unsigned, char, long, char) + +TEST3(unsigned, short, int, char) +TEST3(unsigned, short, long, char) +TEST3(unsigned, short, int, long) +TEST3(unsigned, short, long, int) +TEST3(unsigned, short, char, short) +TEST3(unsigned, short, int, short) +TEST3(unsigned, short, long, short) + +TEST3(unsigned, int, char, short) +TEST3(unsigned, int, short, char) +TEST3(unsigned, int, char, long) +TEST3(unsigned, int, long, char) +TEST3(unsigned, int, short, long) +TEST3(unsigned, int, long, short) +TEST3(unsigned, int, char, int) +TEST3(unsigned, int, short, int) +TEST3(unsigned, int, long, int) + +TEST3(unsigned, long, char, short) +TEST3(unsigned, long, short, char) +TEST3(unsigned, long, char, int) +TEST3(unsigned, long, int, char) +TEST3(unsigned, long, short, int) +TEST3(unsigned, long, int, short) +TEST3(unsigned, long, char, long) +TEST3(unsigned, long, short, long) +TEST3(unsigned, long, int, long) /* { dg-final { scan-assembler-not {\tsabd\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ /* { dg-final { scan-assembler-not {\tuabd\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ |