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authorHans-Peter Nilsson <hp@axis.se>1998-11-04 23:15:35 +0100
committerJeff Law <law@gcc.gnu.org>1998-11-04 15:15:35 -0700
commit8fe1938e51ccbeac307cad41789bdd08ab826050 (patch)
treef4d73cd50b4b4dc960643e8e912776f16c5bb9fa
parent174bcdb9152cb55d3eb7855e789b14cd1031c440 (diff)
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extend.texi: Clarify proper uses for register clobbers in asms.
* extend.texi: Clarify proper uses for register clobbers in asms. 1 From-SVN: r23531
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/extend.texi8
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ae03458..a2c5bee 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Tue Sep 8 23:46:04 1998 Hans-Peter Nilsson <hp@axis.se>
+
+ * extend.texi: Clarify proper uses for register clobbers in asms.
+
Wed Nov 4 22:16:36 1998 Bernd Schmidt <crux@pool.informatik.rwth-aachen.de>
* recog.h (enum op_type): Define.
diff --git a/gcc/extend.texi b/gcc/extend.texi
index a2c278b..dac4035 100644
--- a/gcc/extend.texi
+++ b/gcc/extend.texi
@@ -2404,6 +2404,14 @@ asm volatile ("movc3 %0,%1,%2"
: "r0", "r1", "r2", "r3", "r4", "r5");
@end example
+It is an error for a clobber description to overlap an input or output
+operand (for example, an operand describing a register class with one
+member, mentioned in the clobber list). Most notably, it is invalid to
+describe that an input operand is modified, but unused as output. It has
+to be specified as an input and output operand anyway. Note that if there
+are only unused output operands, you will then also need to specify
+@code{volatile} for the @code{asm} construct, as described below.
+
If you refer to a particular hardware register from the assembler code,
you will probably have to list the register after the third colon to
tell the compiler the register's value is modified. In some assemblers,