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| author | Peter Bergner <bergner@vnet.ibm.com> | 2006-12-13 13:19:03 -0600 |
|---|---|---|
| committer | Peter Bergner <bergner@gcc.gnu.org> | 2006-12-13 13:19:03 -0600 |
| commit | 8c1249f9652e78aa0dd94f9548e4675ebf3e600f (patch) | |
| tree | a3f908a3433ea8a7b7170937c4987b77ea227176 | |
| parent | c53fa1740ae95a29c87a0cff19641657d85eb894 (diff) | |
| download | gcc-8c1249f9652e78aa0dd94f9548e4675ebf3e600f.zip gcc-8c1249f9652e78aa0dd94f9548e4675ebf3e600f.tar.gz gcc-8c1249f9652e78aa0dd94f9548e4675ebf3e600f.tar.bz2 | |
re PR middle-end/30191 (GCC error: in eliminate_regs_in_insn, at reload1.c:3126)
PR middle-end/30191
Revert:
* reload1.c (eliminate_regs_in_insn): Merge the plus_src "else" and
the offset == 0 "then" clauses.
* config/rs6000/predicates.md (gpc_reg_operand): Check for
reload_in_progress.
From-SVN: r119844
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 7 | ||||
| -rw-r--r-- | gcc/reload1.c | 29 |
3 files changed, 33 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 43a12eb..daf8eb7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2006-12-13 Peter Bergner <bergner@vnet.ibm.com> + + PR middle-end/30191 + Revert: + * reload1.c (eliminate_regs_in_insn): Merge the plus_src "else" and + the offset == 0 "then" clauses. + * config/rs6000/predicates.md (gpc_reg_operand): Check for + reload_in_progress. + 2006-12-13 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Define to 53. diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 0b4f7df..6aefe2d 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -81,13 +81,10 @@ (and (match_code "const_int") (match_test "INTVAL (op) > 0 && exact_log2 (INTVAL (op)) >= 0"))) -;; Return 1 if op is a register that is not special. We accept anything -;; during reload_in_progress since eliminate_regs_in_insn() sometimes -;; creates invalid insns which will be fixed up later in reload. +;; Return 1 if op is a register that is not special. (define_predicate "gpc_reg_operand" (and (match_operand 0 "register_operand") - (match_test "(reload_in_progress - || GET_CODE (op) != REG + (match_test "(GET_CODE (op) != REG || (REGNO (op) >= ARG_POINTER_REGNUM && !XER_REGNO_P (REGNO (op))) || REGNO (op) < MQ_REGNO) diff --git a/gcc/reload1.c b/gcc/reload1.c index 7ba93a6..4543835 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -3098,12 +3098,7 @@ eliminate_regs_in_insn (rtx insn, int replace) if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx); - /* If we have a nonzero offset, and the source is already - a simple REG, the following transformation would - increase the cost of the insn by replacing a simple REG - with (plus (reg sp) CST). So try only when we already - had a PLUS before. */ - if (offset == 0 || plus_src) + if (offset == 0) { int num_clobbers; /* We assume here that if we need a PARALLEL with @@ -3112,7 +3107,7 @@ eliminate_regs_in_insn (rtx insn, int replace) There's not much we can do if that doesn't work. */ PATTERN (insn) = gen_rtx_SET (VOIDmode, SET_DEST (old_set), - plus_constant (to_rtx, offset)); + to_rtx); num_clobbers = 0; INSN_CODE (insn) = recog (PATTERN (insn), insn, &num_clobbers); if (num_clobbers) @@ -3125,6 +3120,26 @@ eliminate_regs_in_insn (rtx insn, int replace) } gcc_assert (INSN_CODE (insn) >= 0); } + /* If we have a nonzero offset, and the source is already + a simple REG, the following transformation would + increase the cost of the insn by replacing a simple REG + with (plus (reg sp) CST). So try only when we already + had a PLUS before. */ + else if (plus_src) + { + new_body = old_body; + if (! replace) + { + new_body = copy_insn (old_body); + if (REG_NOTES (insn)) + REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); + } + PATTERN (insn) = new_body; + old_set = single_set (insn); + + XEXP (SET_SRC (old_set), 0) = to_rtx; + XEXP (SET_SRC (old_set), 1) = GEN_INT (offset); + } else break; |