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| author | Hongyu Wang <hongyu.wang@intel.com> | 2023-10-09 09:53:14 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2023-10-09 10:37:22 +0800 |
| commit | 86d92c84762f8c805c4e3d87f394c095139c81f0 (patch) | |
| tree | d420edb2874d9199ebd1c0f81f654ecd54bdb068 | |
| parent | 00c67d62972cef8572393c7f7e10f5d420718e42 (diff) | |
| download | gcc-86d92c84762f8c805c4e3d87f394c095139c81f0.zip gcc-86d92c84762f8c805c4e3d87f394c095139c81f0.tar.gz gcc-86d92c84762f8c805c4e3d87f394c095139c81f0.tar.bz2 | |
[i386] APX EGPR: fix missing patterns that prohibit egpr
For some pattern m/Bm constraint in alternative 0 and 1 could result in
egpr allocated on memory operand under -mapxf. Should use jm/ja instead.
gcc/ChangeLog:
* config/i386/sse.md (vec_concatv2di): Replace constraint "m"
with "jm" for alternative 0 and 1 of operand 2.
(sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
"ja" for alternative 0 and 1 of operand2.
| -rw-r--r-- | gcc/config/i386/sse.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6bffd74..22e43eb 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -16842,7 +16842,7 @@ [(set (match_operand:VI24_128 0 "register_operand" "=Yr,*x,<v_Yw>") (umaxmin:VI24_128 (match_operand:VI24_128 1 "vector_operand" "%0,0,<v_Yw>") - (match_operand:VI24_128 2 "vector_operand" "YrBm,*xBm,<v_Yw>m")))] + (match_operand:VI24_128 2 "vector_operand" "Yrja,*xja,<v_Yw>m")))] "TARGET_SSE4_1 && <mask_mode512bit_condition> && !(MEM_P (operands[1]) && MEM_P (operands[2]))" @@ -20638,7 +20638,7 @@ (match_operand:DI 1 "register_operand" " 0, 0,x ,Yv,0,Yv,0,0,v") (match_operand:DI 2 "nonimmediate_operand" - " jrm,jrm,rm,rm,x,Yv,x,m,m")))] + " jrjm,jrjm,rm,rm,x,Yv,x,m,m")))] "TARGET_SSE" "@ pinsrq\t{$1, %2, %0|%0, %2, 1} |