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| author | Uros Bizjak <uros@gcc.gnu.org> | 2018-09-25 18:06:36 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-09-25 18:06:36 +0200 |
| commit | 84848f51990785a127c32236be63c10e579a9332 (patch) | |
| tree | b6c56b07e59439f2cd5d946aee24cd51c2c57838 | |
| parent | 0ae1678fd9f972a64bfa54da723e760d32dd95ab (diff) | |
| download | gcc-84848f51990785a127c32236be63c10e579a9332.zip gcc-84848f51990785a127c32236be63c10e579a9332.tar.gz gcc-84848f51990785a127c32236be63c10e579a9332.tar.bz2 | |
* config/i386/i386.md: Move nearbyint patterns closer to rint.
From-SVN: r264578
| -rw-r--r-- | gcc/config/i386/i386.md | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 75e2edb..fc5cfd0 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16125,6 +16125,38 @@ DONE; }) +(define_expand "nearbyintxf2" + [(set (match_operand:XF 0 "register_operand") + (unspec:XF [(match_operand:XF 1 "register_operand")] + UNSPEC_FRNDINT))] + "TARGET_USE_FANCY_MATH_387 + && !flag_trapping_math") + +(define_expand "nearbyint<mode>2" + [(use (match_operand:MODEF 0 "register_operand")) + (use (match_operand:MODEF 1 "nonimmediate_operand"))] + "(TARGET_USE_FANCY_MATH_387 + && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH) + || TARGET_MIX_SSE_I387) + && !flag_trapping_math) + || (TARGET_SSE4_1 && TARGET_SSE_MATH)" +{ + if (TARGET_SSE4_1 && TARGET_SSE_MATH) + emit_insn (gen_sse4_1_round<mode>2 + (operands[0], operands[1], GEN_INT (ROUND_MXCSR + | ROUND_NO_EXC))); + else + { + rtx op0 = gen_reg_rtx (XFmode); + rtx op1 = gen_reg_rtx (XFmode); + + emit_insn (gen_extend<mode>xf2 (op1, operands[1])); + emit_insn (gen_nearbyintxf2 (op0, op1)); + emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0)); + } + DONE; +}) + (define_expand "round<mode>2" [(match_operand:X87MODEF 0 "register_operand") (match_operand:X87MODEF 1 "nonimmediate_operand")] @@ -16340,38 +16372,6 @@ DONE; }) -(define_expand "nearbyintxf2" - [(set (match_operand:XF 0 "register_operand") - (unspec:XF [(match_operand:XF 1 "register_operand")] - UNSPEC_FRNDINT))] - "TARGET_USE_FANCY_MATH_387 - && !flag_trapping_math") - -(define_expand "nearbyint<mode>2" - [(use (match_operand:MODEF 0 "register_operand")) - (use (match_operand:MODEF 1 "nonimmediate_operand"))] - "(TARGET_USE_FANCY_MATH_387 - && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH) - || TARGET_MIX_SSE_I387) - && !flag_trapping_math) - || (TARGET_SSE4_1 && TARGET_SSE_MATH)" -{ - if (TARGET_SSE4_1 && TARGET_SSE_MATH) - emit_insn (gen_sse4_1_round<mode>2 - (operands[0], operands[1], GEN_INT (ROUND_MXCSR - | ROUND_NO_EXC))); - else - { - rtx op0 = gen_reg_rtx (XFmode); - rtx op1 = gen_reg_rtx (XFmode); - - emit_insn (gen_extend<mode>xf2 (op1, operands[1])); - emit_insn (gen_nearbyintxf2 (op0, op1)); - emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0)); - } - DONE; -}) - ;; Rounding mode control word calculation could clobber FLAGS_REG. (define_insn_and_split "*fist<mode>2_<rounding>_1" [(set (match_operand:SWI248x 0 "nonimmediate_operand") |