re PR target/49606 (mips64: o64 Unrecognizable insn when one noreturn function calling another noreturn function)

gcc/
	PR target/49606
	* config/mips/mips.h (ABI_HAS_64BIT_SYMBOLS): Check Pmode.
	(PMODE_INSN): New macro.
	* config/mips/mips.c (gen_load_const_gp): Use PMODE_INSN.
	(mips_got_load, mips_expand_synci_loop): Likewise.
	(mips_save_gp_to_cprestore_slot): Handle SImode and DImode
	cprestore patterns.
	(mips_emit_loadgp): Use PMODE_INSN.  Handle SImode and DImode
	copygp_mips16 patterns.
	(mips_expand_prologue): Handle SImode and DImode potential_cprestore
	and use_cprestore patterns.
	(mips_override_options): Check for incompatible -mabi and -mlong
	combinations.
	* config/mips/mips.md (unspec_got<mode>): Rename to...
	(unspec_got_<mode>): ...this.
	(copygp_mips16): Use the Pmode iterator.
	(potential_cprestore, cprestore, use_cprestore): Likewise.
	(clear_cache, indirect_jump): Use PMODE_INSN.
	(indirect_jump<mode>): Rename to...
	(indirect_jump_<mode>): ...this.
	(tablejump): Use PMODE_INSN.
	(tablejump<mode>): Rename to...
	(tablejump_<mode>): ...this.
	(exception_receiver): Handle restore_gp_si and restore_gp_di.
	(restore_gp): Use the Pmode iterator.
	* config/mips/mips-dsp.md (mips_lbux, mips_lhx, mips_lwx): Use
	PMODE_INSN.

gcc/testsuite/
	PR target/49606
	* gcc.target/mips/abi-main.h: New file.
	* gcc.target/mips/abi-o32-long32.c: New test.
	* gcc.target/mips/abi-o32-long64.c: Likewise.
	* gcc.target/mips/abi-o64-long32.c: Likewise.
	* gcc.target/mips/abi-o64-long64.c: Likewise.
	* gcc.target/mips/abi-n32-long32.c: Likewise.
	* gcc.target/mips/abi-n32-long64.c: Likewise.
	* gcc.target/mips/abi-n64-long32.c: Likewise.
	* gcc.target/mips/abi-n64-long64.c: Likewise.
	* gcc.target/mips/abi-o32-long32-no-shared.c: Likewise.
	* gcc.target/mips/abi-o32-long64-no-shared.c: Likewise.
	* gcc.target/mips/abi-o64-long32-no-shared.c: Likewise.
	* gcc.target/mips/abi-o64-long64-no-shared.c: Likewise.
	* gcc.target/mips/abi-n32-long32-no-shared.c: Likewise.
	* gcc.target/mips/abi-n32-long64-no-shared.c: Likewise.
	* gcc.target/mips/abi-n64-long32-no-shared.c: Likewise.
	* gcc.target/mips/abi-n64-long64-no-shared.c: Likewise.
	* gcc.target/mips/abi-o32-long32-pic.c: Likewise.
	* gcc.target/mips/abi-o32-long64-pic.c: Likewise.
	* gcc.target/mips/abi-o64-long32-pic.c: Likewise.
	* gcc.target/mips/abi-o64-long64-pic.c: Likewise.
	* gcc.target/mips/abi-n32-long32-pic.c: Likewise.
	* gcc.target/mips/abi-n32-long64-pic.c: Likewise.
	* gcc.target/mips/abi-n64-long32-pic.c: Likewise.
	* gcc.target/mips/abi-n64-long64-pic.c: Likewise.
	* gcc.target/mips/abi-eabi32-long32.c: Likewise.
	* gcc.target/mips/abi-eabi32-long64.c: Likewise.
	* gcc.target/mips/abi-eabi64-long32.c: Likewise.
	* gcc.target/mips/abi-eabi64-long64.c: Likewise.
	* gcc.target/mips/mips.exp: Make -mshared implied -mabicalls.
	* gcc.target/mips/branch-2.c: Remove -mabicalls.
	* gcc.target/mips/branch-3.c: Likewise.
	* gcc.target/mips/branch-4.c: Likewise.
	* gcc.target/mips/branch-5.c: Likewise.
	* gcc.target/mips/branch-6.c: Likewise.
	* gcc.target/mips/branch-7.c: Likewise.
	* gcc.target/mips/branch-8.c: Likewise.
	* gcc.target/mips/branch-9.c: Likewise.
	* gcc.target/mips/branch-10.c: Likewise.
	* gcc.target/mips/branch-11.c: Likewise.
	* gcc.target/mips/branch-12.c: Likewise.
	* gcc.target/mips/branch-13.c: Likewise.
	* gcc.target/mips/lazy-binding-1.c: Likewise.

From-SVN: r178557

49 files changed, 320 insertions, 88 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 08dd4a4..ab45df4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,35 @@
 2011-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
 
+	PR target/49606
+	* config/mips/mips.h (ABI_HAS_64BIT_SYMBOLS): Check Pmode.
+	(PMODE_INSN): New macro.
+	* config/mips/mips.c (gen_load_const_gp): Use PMODE_INSN.
+	(mips_got_load, mips_expand_synci_loop): Likewise.
+	(mips_save_gp_to_cprestore_slot): Handle SImode and DImode
+	cprestore patterns.
+	(mips_emit_loadgp): Use PMODE_INSN.  Handle SImode and DImode
+	copygp_mips16 patterns.
+	(mips_expand_prologue): Handle SImode and DImode potential_cprestore
+	and use_cprestore patterns.
+	(mips_override_options): Check for incompatible -mabi and -mlong
+	combinations.
+	* config/mips/mips.md (unspec_got<mode>): Rename to...
+	(unspec_got_<mode>): ...this.
+	(copygp_mips16): Use the Pmode iterator.
+	(potential_cprestore, cprestore, use_cprestore): Likewise.
+	(clear_cache, indirect_jump): Use PMODE_INSN.
+	(indirect_jump<mode>): Rename to...
+	(indirect_jump_<mode>): ...this.
+	(tablejump): Use PMODE_INSN.
+	(tablejump<mode>): Rename to...
+	(tablejump_<mode>): ...this.
+	(exception_receiver): Handle restore_gp_si and restore_gp_di.
+	(restore_gp): Use the Pmode iterator.
+	* config/mips/mips-dsp.md (mips_lbux, mips_lhx, mips_lwx): Use
+	PMODE_INSN.
+
+2011-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
+
 	* config/mips/mips.c (mips_gimplify_va_arg_expr): Unshare off.
 	Fix the type of the BIT_AND_EXPR.
 
diff --git a/gcc/config/mips/mips-dsp.md b/gcc/config/mips/mips-dsp.md
index 4f518cb..0f73d08 100644
--- a/gcc/config/mips/mips-dsp.md
+++ b/gcc/config/mips/mips-dsp.md
@@ -1105,10 +1105,8 @@
   "ISA_HAS_DSP"
 {
   operands[2] = convert_to_mode (Pmode, operands[2], false);
-  if (Pmode == SImode)
-    emit_insn (gen_mips_lbux_si (operands[0], operands[1], operands[2]));
-  else
-    emit_insn (gen_mips_lbux_di (operands[0], operands[1], operands[2]));
+  emit_insn (PMODE_INSN (gen_mips_lbux,
+			 (operands[0], operands[1], operands[2])));
   DONE;
 })
 
@@ -1129,10 +1127,8 @@
   "ISA_HAS_DSP"
 {
   operands[2] = convert_to_mode (Pmode, operands[2], false);
-  if (Pmode == SImode)
-    emit_insn (gen_mips_lhx_si (operands[0], operands[1], operands[2]));
-  else
-    emit_insn (gen_mips_lhx_di (operands[0], operands[1], operands[2]));
+  emit_insn (PMODE_INSN (gen_mips_lhx,
+			 (operands[0], operands[1], operands[2])));
   DONE;
 })
 
@@ -1153,10 +1149,8 @@
   "ISA_HAS_DSP"
 {
   operands[2] = convert_to_mode (Pmode, operands[2], false);
-  if (Pmode == SImode)
-    emit_insn (gen_mips_lwx_si (operands[0], operands[1], operands[2]));
-  else
-    emit_insn (gen_mips_lwx_di (operands[0], operands[1], operands[2]));
+  emit_insn (PMODE_INSN (gen_mips_lwx,
+			 (operands[0], operands[1], operands[2])));
   DONE;
 })
 
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index a5d1eed..a0e93c5 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -2522,9 +2522,7 @@ mips_unspec_offset_high (rtx temp, rtx base, rtx addr,
 static rtx
 gen_load_const_gp (rtx reg)
 {
-  return (Pmode == SImode
-	  ? gen_load_const_gp_si (reg)
-	  : gen_load_const_gp_di (reg));
+  return PMODE_INSN (gen_load_const_gp, (reg));
 }
 
 /* Return a pseudo register that contains the value of $gp throughout
@@ -2626,9 +2624,7 @@ mips_got_load (rtx temp, rtx addr, enum mips_symbol_type type)
   if (type == SYMBOL_GOTOFF_CALL)
     return mips_unspec_call (high, lo_sum_symbol);
   else
-    return (Pmode == SImode
-	    ? gen_unspec_gotsi (high, lo_sum_symbol)
-	    : gen_unspec_gotdi (high, lo_sum_symbol));
+    return PMODE_INSN (gen_unspec_got, (high, lo_sum_symbol));
 }
 
 /* If MODE is MAX_MACHINE_MODE, ADDR appears as a move operand, otherwise
@@ -6676,9 +6672,7 @@ mips_expand_synci_loop (rtx begin, rtx end)
 
   /* Load INC with the cache line size (rdhwr INC,$1).  */
   inc = gen_reg_rtx (Pmode);
-  emit_insn (Pmode == SImode
-	     ? gen_rdhwr_synci_step_si (inc)
-	     : gen_rdhwr_synci_step_di (inc));
+  emit_insn (PMODE_INSN (gen_rdhwr_synci_step, (inc)));
 
   /* Check if inc is 0.  */
   cmp_result = gen_rtx_EQ (VOIDmode, inc, const0_rtx);
@@ -9526,7 +9520,7 @@ mips_save_gp_to_cprestore_slot (rtx mem, rtx offset, rtx gp, rtx temp)
   if (TARGET_CPRESTORE_DIRECTIVE)
     {
       gcc_assert (gp == pic_offset_table_rtx);
-      emit_insn (gen_cprestore (mem, offset));
+      emit_insn (PMODE_INSN (gen_cprestore, (mem, offset)));
     }
   else
     mips_emit_move (mips_cprestore_slot (temp, false), gp);
@@ -9913,9 +9907,8 @@ mips_emit_loadgp (void)
 	  mips_gnu_local_gp = gen_rtx_SYMBOL_REF (Pmode, "__gnu_local_gp");
 	  SYMBOL_REF_FLAGS (mips_gnu_local_gp) |= SYMBOL_FLAG_LOCAL;
 	}
-      emit_insn (Pmode == SImode
-		 ? gen_loadgp_absolute_si (pic_reg, mips_gnu_local_gp)
-		 : gen_loadgp_absolute_di (pic_reg, mips_gnu_local_gp));
+      emit_insn (PMODE_INSN (gen_loadgp_absolute,
+			     (pic_reg, mips_gnu_local_gp)));
       break;
 
     case LOADGP_OLDABI:
@@ -9926,17 +9919,14 @@ mips_emit_loadgp (void)
       addr = XEXP (DECL_RTL (current_function_decl), 0);
       offset = mips_unspec_address (addr, SYMBOL_GOTOFF_LOADGP);
       incoming_address = gen_rtx_REG (Pmode, PIC_FUNCTION_ADDR_REGNUM);
-      emit_insn (Pmode == SImode
-		 ? gen_loadgp_newabi_si (pic_reg, offset, incoming_address)
-		 : gen_loadgp_newabi_di (pic_reg, offset, incoming_address));
+      emit_insn (PMODE_INSN (gen_loadgp_newabi,
+			     (pic_reg, offset, incoming_address)));
       break;
 
     case LOADGP_RTP:
       base = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (VXWORKS_GOTT_BASE));
       index = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (VXWORKS_GOTT_INDEX));
-      emit_insn (Pmode == SImode
-		 ? gen_loadgp_rtp_si (pic_reg, base, index)
-		 : gen_loadgp_rtp_di (pic_reg, base, index));
+      emit_insn (PMODE_INSN (gen_loadgp_rtp, (pic_reg, base, index)));
       break;
 
     default:
@@ -9944,7 +9934,8 @@ mips_emit_loadgp (void)
     }
 
   if (TARGET_MIPS16)
-    emit_insn (gen_copygp_mips16 (pic_offset_table_rtx, pic_reg));
+    emit_insn (PMODE_INSN (gen_copygp_mips16,
+			   (pic_offset_table_rtx, pic_reg)));
 
   /* Emit a blockage if there are implicit uses of the GP register.
      This includes profiled functions, because FUNCTION_PROFILE uses
@@ -10200,11 +10191,12 @@ mips_expand_prologue (void)
       temp = (SMALL_OPERAND (offset)
 	      ? gen_rtx_SCRATCH (Pmode)
 	      : MIPS_PROLOGUE_TEMP (Pmode));
-      emit_insn (gen_potential_cprestore (mem, GEN_INT (offset), gp, temp));
+      emit_insn (PMODE_INSN (gen_potential_cprestore,
+			     (mem, GEN_INT (offset), gp, temp)));
 
       mips_get_cprestore_base_and_offset (&base, &offset, true);
       mem = gen_frame_mem (Pmode, plus_constant (base, offset));
-      emit_insn (gen_use_cprestore (mem));
+      emit_insn (PMODE_INSN (gen_use_cprestore, (mem)));
     }
 
   /* We need to search back to the last use of K0 or K1.  */
@@ -15400,8 +15392,32 @@ mips_option_override (void)
 
   /* End of code shared with GAS.  */
 
-  /* If no -mlong* option was given, infer it from the other options.  */
-  if ((target_flags_explicit & MASK_LONG64) == 0)
+  /* If a -mlong* option was given, check that it matches the ABI,
+     otherwise infer the -mlong* setting from the other options.  */
+  if ((target_flags_explicit & MASK_LONG64) != 0)
+    {
+      if (TARGET_LONG64)
+	{
+	  if (mips_abi == ABI_N32)
+	    error ("%qs is incompatible with %qs", "-mabi=n32", "-mlong64");
+	  else if (mips_abi == ABI_32)
+	    error ("%qs is incompatible with %qs", "-mabi=32", "-mlong64");
+	  else if (mips_abi == ABI_O64 && TARGET_ABICALLS)
+	    /* We have traditionally allowed non-abicalls code to use
+	       an LP64 form of o64.  However, it would take a bit more
+	       effort to support the combination of 32-bit GOT entries
+	       and 64-bit pointers, so we treat the abicalls case as
+	       an error.  */
+	    error ("the combination of %qs and %qs is incompatible with %qs",
+		   "-mabi=o64", "-mabicalls", "-mlong64");
+	}
+      else
+	{
+	  if (mips_abi == ABI_64)
+	    error ("%qs is incompatible with %qs", "-mabi=64", "-mlong32");
+	}
+    }
+  else
     {
       if ((mips_abi == ABI_EABI && TARGET_64BIT) || mips_abi == ABI_64)
 	target_flags |= MASK_LONG64;
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 92e932a..236afbb 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -792,7 +792,9 @@ struct mips_cpu_info {
    the ABI's file format, but it can be overridden by -msym32.  Note that
    overriding the size with -msym32 changes the ABI of relocatable objects,
    although it doesn't change the ABI of a fully-linked object.  */
-#define ABI_HAS_64BIT_SYMBOLS	(FILE_HAS_64BIT_SYMBOLS && !TARGET_SYM32)
+#define ABI_HAS_64BIT_SYMBOLS	(FILE_HAS_64BIT_SYMBOLS \
+				 && Pmode == DImode	\
+				 && !TARGET_SYM32)
 
 /* ISA has instructions for managing 64-bit fp and gp regs (e.g. mips3).  */
 #define ISA_HAS_64BIT_REGS	(ISA_MIPS3				\
@@ -2916,3 +2918,10 @@ extern GTY(()) struct target_globals *mips16_globals;
 
 /* For switching between MIPS16 and non-MIPS16 modes.  */
 #define SWITCHABLE_TARGET 1
+
+/* Several named MIPS patterns depend on Pmode.  These patterns have the
+   form <NAME>_si for Pmode == SImode and <NAME>_di for Pmode == DImode.
+   Add the appropriate suffix to generator function NAME and invoke it
+   with arguments ARGS.  */
+#define PMODE_INSN(NAME, ARGS) \
+  (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS)
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 0606f92..de95321 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -3866,7 +3866,7 @@
    (set_attr "mode" "<MODE>")])
 
 ;; Convenience expander that generates the rhs of a load_got<mode> insn.
-(define_expand "unspec_got<mode>"
+(define_expand "unspec_got_<mode>"
   [(unspec:P [(match_operand:P 0)
 	      (match_operand:P 1)] UNSPEC_LOAD_GOT)])
 
@@ -4783,10 +4783,10 @@
 ;; Initialize the global pointer for MIPS16 code.  Operand 0 is the
 ;; global pointer and operand 1 is the MIPS16 register that holds
 ;; the required value.
-(define_insn_and_split "copygp_mips16"
-  [(set (match_operand:SI 0 "register_operand" "=y")
-	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-		   UNSPEC_COPYGP))]
+(define_insn_and_split "copygp_mips16_<mode>"
+  [(set (match_operand:P 0 "register_operand" "=y")
+	(unspec:P [(match_operand:P 1 "register_operand" "d")]
+		  UNSPEC_COPYGP))]
   "TARGET_MIPS16"
   { return mips_must_initialize_gp_p () ? "#" : ""; }
   "&& mips_must_initialize_gp_p ()"
@@ -4800,12 +4800,12 @@
 ;;
 ;; The "cprestore" pattern requires operand 2 to be pic_offset_table_rtx,
 ;; otherwise any register that holds the correct value will do.
-(define_insn_and_split "potential_cprestore"
-  [(set (match_operand:SI 0 "cprestore_save_slot_operand" "=X,X")
-	(unspec:SI [(match_operand:SI 1 "const_int_operand" "I,i")
-		    (match_operand:SI 2 "register_operand" "d,d")]
-		   UNSPEC_POTENTIAL_CPRESTORE))
-   (clobber (match_operand:SI 3 "scratch_operand" "=X,&d"))]
+(define_insn_and_split "potential_cprestore_<mode>"
+  [(set (match_operand:P 0 "cprestore_save_slot_operand" "=X,X")
+	(unspec:P [(match_operand:P 1 "const_int_operand" "I,i")
+		   (match_operand:P 2 "register_operand" "d,d")]
+		  UNSPEC_POTENTIAL_CPRESTORE))
+   (clobber (match_operand:P 3 "scratch_operand" "=X,&d"))]
   "!TARGET_CPRESTORE_DIRECTIVE || operands[2] == pic_offset_table_rtx"
   { return mips_must_initialize_gp_p () ? "#" : ""; }
   "mips_must_initialize_gp_p ()"
@@ -4822,11 +4822,11 @@
 ;; for the cprestore slot.  Operand 1 is the offset of the slot from
 ;; the stack pointer.  (This is redundant with operand 0, but it makes
 ;; things a little simpler.)
-(define_insn "cprestore"
-  [(set (match_operand:SI 0 "cprestore_save_slot_operand" "=X,X")
-	(unspec:SI [(match_operand:SI 1 "const_int_operand" "I,i")
-		    (reg:SI 28)]
-		   UNSPEC_CPRESTORE))]
+(define_insn "cprestore_<mode>"
+  [(set (match_operand:P 0 "cprestore_save_slot_operand" "=X,X")
+	(unspec:P [(match_operand:P 1 "const_int_operand" "I,i")
+		   (reg:P 28)]
+		  UNSPEC_CPRESTORE))]
   "TARGET_CPRESTORE_DIRECTIVE"
 {
   if (mips_nomacro.nesting_level > 0 && which_alternative == 1)
@@ -4837,9 +4837,9 @@
   [(set_attr "type" "store")
    (set_attr "length" "4,12")])
 
-(define_insn "use_cprestore"
-  [(set (reg:SI CPRESTORE_SLOT_REGNUM)
-	(match_operand:SI 0 "cprestore_load_slot_operand"))]
+(define_insn "use_cprestore_<mode>"
+  [(set (reg:P CPRESTORE_SLOT_REGNUM)
+	(match_operand:P 0 "cprestore_load_slot_operand"))]
   ""
   ""
   [(set_attr "type" "ghost")])
@@ -4856,9 +4856,7 @@
     {
       mips_expand_synci_loop (operands[0], operands[1]);
       emit_insn (gen_sync ());
-      emit_insn (Pmode == SImode
-		 ? gen_clear_hazard_si ()
-		 : gen_clear_hazard_di ());
+      emit_insn (PMODE_INSN (gen_clear_hazard, ()));
     }
   else if (mips_cache_flush_func && mips_cache_flush_func[0])
     {
@@ -5567,14 +5565,11 @@
   ""
 {
   operands[0] = force_reg (Pmode, operands[0]);
-  if (Pmode == SImode)
-    emit_jump_insn (gen_indirect_jumpsi (operands[0]));
-  else
-    emit_jump_insn (gen_indirect_jumpdi (operands[0]));
+  emit_jump_insn (PMODE_INSN (gen_indirect_jump, (operands[0])));
   DONE;
 })
 
-(define_insn "indirect_jump<mode>"
+(define_insn "indirect_jump_<mode>"
   [(set (pc) (match_operand:P 0 "register_operand" "d"))]
   ""
   "%*j\t%0%/"
@@ -5605,14 +5600,11 @@
 				  start, 0, 0, OPTAB_WIDEN);
     }
 
-  if (Pmode == SImode)
-    emit_jump_insn (gen_tablejumpsi (operands[0], operands[1]));
-  else
-    emit_jump_insn (gen_tablejumpdi (operands[0], operands[1]));
+  emit_jump_insn (PMODE_INSN (gen_tablejump, (operands[0], operands[1])));
   DONE;
 })
 
-(define_insn "tablejump<mode>"
+(define_insn "tablejump_<mode>"
   [(set (pc)
 	(match_operand:P 0 "register_operand" "d"))
    (use (label_ref (match_operand 1 "" "")))]
@@ -5844,8 +5836,10 @@
   emit_insn (gen_set_got_version ());
 
   /* If we have a call-clobbered $gp, restore it from its save slot.  */
-  if (HAVE_restore_gp)
-    emit_insn (gen_restore_gp ());
+  if (HAVE_restore_gp_si)
+    emit_insn (gen_restore_gp_si ());
+  else if (HAVE_restore_gp_di)
+    emit_insn (gen_restore_gp_di ());
   DONE;
 })
 
@@ -5860,10 +5854,10 @@
 
 ;; Restore $gp from its .cprestore stack slot.  The instruction remains
 ;; volatile until all uses of $28 are exposed.
-(define_insn_and_split "restore_gp"
-  [(set (reg:SI 28)
-	(unspec_volatile:SI [(const_int 0)] UNSPEC_RESTORE_GP))
-   (clobber (match_scratch:SI 0 "=&d"))]
+(define_insn_and_split "restore_gp_<mode>"
+  [(set (reg:P 28)
+	(unspec_volatile:P [(const_int 0)] UNSPEC_RESTORE_GP))
+   (clobber (match_scratch:P 0 "=&d"))]
   "TARGET_CALL_CLOBBERED_GP"
   "#"
   "&& epilogue_completed"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b7116c9..0f24c9d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,50 @@
+2011-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	PR target/49606
+	* gcc.target/mips/abi-main.h: New file.
+	* gcc.target/mips/abi-o32-long32.c: New test.
+	* gcc.target/mips/abi-o32-long64.c: Likewise.
+	* gcc.target/mips/abi-o64-long32.c: Likewise.
+	* gcc.target/mips/abi-o64-long64.c: Likewise.
+	* gcc.target/mips/abi-n32-long32.c: Likewise.
+	* gcc.target/mips/abi-n32-long64.c: Likewise.
+	* gcc.target/mips/abi-n64-long32.c: Likewise.
+	* gcc.target/mips/abi-n64-long64.c: Likewise.
+	* gcc.target/mips/abi-o32-long32-no-shared.c: Likewise.
+	* gcc.target/mips/abi-o32-long64-no-shared.c: Likewise.
+	* gcc.target/mips/abi-o64-long32-no-shared.c: Likewise.
+	* gcc.target/mips/abi-o64-long64-no-shared.c: Likewise.
+	* gcc.target/mips/abi-n32-long32-no-shared.c: Likewise.
+	* gcc.target/mips/abi-n32-long64-no-shared.c: Likewise.
+	* gcc.target/mips/abi-n64-long32-no-shared.c: Likewise.
+	* gcc.target/mips/abi-n64-long64-no-shared.c: Likewise.
+	* gcc.target/mips/abi-o32-long32-pic.c: Likewise.
+	* gcc.target/mips/abi-o32-long64-pic.c: Likewise.
+	* gcc.target/mips/abi-o64-long32-pic.c: Likewise.
+	* gcc.target/mips/abi-o64-long64-pic.c: Likewise.
+	* gcc.target/mips/abi-n32-long32-pic.c: Likewise.
+	* gcc.target/mips/abi-n32-long64-pic.c: Likewise.
+	* gcc.target/mips/abi-n64-long32-pic.c: Likewise.
+	* gcc.target/mips/abi-n64-long64-pic.c: Likewise.
+	* gcc.target/mips/abi-eabi32-long32.c: Likewise.
+	* gcc.target/mips/abi-eabi32-long64.c: Likewise.
+	* gcc.target/mips/abi-eabi64-long32.c: Likewise.
+	* gcc.target/mips/abi-eabi64-long64.c: Likewise.
+	* gcc.target/mips/mips.exp: Make -mshared implied -mabicalls.
+	* gcc.target/mips/branch-2.c: Remove -mabicalls.
+	* gcc.target/mips/branch-3.c: Likewise.
+	* gcc.target/mips/branch-4.c: Likewise.
+	* gcc.target/mips/branch-5.c: Likewise.
+	* gcc.target/mips/branch-6.c: Likewise.
+	* gcc.target/mips/branch-7.c: Likewise.
+	* gcc.target/mips/branch-8.c: Likewise.
+	* gcc.target/mips/branch-9.c: Likewise.
+	* gcc.target/mips/branch-10.c: Likewise.
+	* gcc.target/mips/branch-11.c: Likewise.
+	* gcc.target/mips/branch-12.c: Likewise.
+	* gcc.target/mips/branch-13.c: Likewise.
+	* gcc.target/mips/lazy-binding-1.c: Likewise.
+
 2011-09-05  Georg-Johann Lay  <avr@gjlay.de>
 
 	* gcc.dg/ipa/ipcp-3.c (mark_cell): Use mask 1 << 14 instead of 1
diff --git a/gcc/testsuite/gcc.target/mips/abi-eabi32-long32.c b/gcc/testsuite/gcc.target/mips/abi-eabi32-long32.c
new file mode 100644
index 0000000..ebc5dd6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-eabi32-long32.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=eabi -mgp32 -mlong32 -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-eabi32-long64.c b/gcc/testsuite/gcc.target/mips/abi-eabi32-long64.c
new file mode 100644
index 0000000..5a776ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-eabi32-long64.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=eabi -mgp32 -mlong64 -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-eabi64-long32.c b/gcc/testsuite/gcc.target/mips/abi-eabi64-long32.c
new file mode 100644
index 0000000..3882e48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-eabi64-long32.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=eabi -mgp64 -mlong32 -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-eabi64-long64.c b/gcc/testsuite/gcc.target/mips/abi-eabi64-long64.c
new file mode 100644
index 0000000..5569bf5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-eabi64-long64.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=eabi -mgp64 -mlong64 -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-main.h b/gcc/testsuite/gcc.target/mips/abi-main.h
new file mode 100644
index 0000000..f47a2e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-main.h
@@ -0,0 +1,74 @@
+#define FOR_EACH_SCALAR(F)	\
+  F(sc, signed char)		\
+  F(uc, unsigned char)		\
+  F(ss, short)			\
+  F(us, unsigned short)		\
+  F(si, int)			\
+  F(ui, unsigned int)		\
+  F(sl, long)			\
+  F(ul, unsigned long)		\
+  F(sll, long long)		\
+  F(ull, unsigned long long)	\
+  F(f, float)			\
+  F(d, double)			\
+  F(ld, long double)		\
+  F(ptr, void *)
+
+#define EXTERN(SUFFIX, TYPE) extern TYPE x##SUFFIX;
+#define STATIC(SUFFIX, TYPE) static TYPE s##SUFFIX;
+#define COMMON(SUFFIX, TYPE) TYPE c##SUFFIX;
+
+#define GETADDR(SUFFIX, TYPE)			\
+  TYPE *get##SUFFIX (int which)			\
+  {						\
+    return (which == 0 ? &c##SUFFIX		\
+	    : which == 1 ? &s##SUFFIX		\
+	    : &x##SUFFIX);			\
+  }
+
+#define COPY(SUFFIX, TYPE) c##SUFFIX = s##SUFFIX; s##SUFFIX = x##SUFFIX;
+
+FOR_EACH_SCALAR (EXTERN)
+FOR_EACH_SCALAR (STATIC)
+FOR_EACH_SCALAR (COMMON)
+
+FOR_EACH_SCALAR (GETADDR)
+
+void
+copy (void)
+{
+  FOR_EACH_SCALAR (COPY);
+}
+
+extern void foo (int);
+
+void
+sibcall1 (void)
+{
+  foo (1);
+}
+
+void
+sibcall2 (void)
+{
+  foo (csi + ssi + xsi);
+}
+
+static void
+sibcall3 (void)
+{
+  foo (1);
+  foo (2);
+  foo (3);
+}
+
+extern void bar (void (*) (void));
+
+int
+nested (int x)
+{
+  void sub (void) { foo (x); }
+  bar (sub);
+  bar (sibcall3);
+  return 1;
+}
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long32-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-n32-long32-no-shared.c
new file mode 100644
index 0000000..5cab4c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long32-no-shared.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=n32 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long32-pic.c b/gcc/testsuite/gcc.target/mips/abi-n32-long32-pic.c
new file mode 100644
index 0000000..eb455da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long32-pic.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=n32 -mlong32 -fpic -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long32.c b/gcc/testsuite/gcc.target/mips/abi-n32-long32.c
new file mode 100644
index 0000000..6a0f702
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long32.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=n32 -mlong32 addressing=absolute -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long64-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-n32-long64-no-shared.c
new file mode 100644
index 0000000..3edf867
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long64-no-shared.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=n32 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long64-pic.c b/gcc/testsuite/gcc.target/mips/abi-n32-long64-pic.c
new file mode 100644
index 0000000..b444209
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long64-pic.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=n32 -mlong64 -fpic -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n32-long64.c b/gcc/testsuite/gcc.target/mips/abi-n32-long64.c
new file mode 100644
index 0000000..868719c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n32-long64.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=n32 -mlong64 addressing=absolute -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long32-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-n64-long32-no-shared.c
new file mode 100644
index 0000000..b268d88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long32-no-shared.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=64 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long32-pic.c b/gcc/testsuite/gcc.target/mips/abi-n64-long32-pic.c
new file mode 100644
index 0000000..5a0d917
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long32-pic.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=64 -mlong32 -fpic -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long32.c b/gcc/testsuite/gcc.target/mips/abi-n64-long32.c
new file mode 100644
index 0000000..4227169
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long32.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=64 -mlong32 addressing=absolute -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long64-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-n64-long64-no-shared.c
new file mode 100644
index 0000000..5301cfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long64-no-shared.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=64 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long64-pic.c b/gcc/testsuite/gcc.target/mips/abi-n64-long64-pic.c
new file mode 100644
index 0000000..f43e915
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long64-pic.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=64 -mlong64 -fpic -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-n64-long64.c b/gcc/testsuite/gcc.target/mips/abi-n64-long64.c
new file mode 100644
index 0000000..a670fe5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-n64-long64.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=64 -mlong64 addressing=absolute -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long32-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-o32-long32-no-shared.c
new file mode 100644
index 0000000..2032b36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long32-no-shared.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=32 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long32-pic.c b/gcc/testsuite/gcc.target/mips/abi-o32-long32-pic.c
new file mode 100644
index 0000000..5a3e93e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long32-pic.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=32 -mlong32 -fpic -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long32.c b/gcc/testsuite/gcc.target/mips/abi-o32-long32.c
new file mode 100644
index 0000000..bdb9464
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long32.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=32 -mlong32 addressing=absolute -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long64-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-o32-long64-no-shared.c
new file mode 100644
index 0000000..6340b63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long64-no-shared.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=32 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long64-pic.c b/gcc/testsuite/gcc.target/mips/abi-o32-long64-pic.c
new file mode 100644
index 0000000..1583034
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long64-pic.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=32 -mlong64 -fpic -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o32-long64.c b/gcc/testsuite/gcc.target/mips/abi-o32-long64.c
new file mode 100644
index 0000000..4a88739
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o32-long64.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=32 -mlong64 addressing=absolute -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long32-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-o64-long32-no-shared.c
new file mode 100644
index 0000000..548ae0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long32-no-shared.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=o64 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long32-pic.c b/gcc/testsuite/gcc.target/mips/abi-o64-long32-pic.c
new file mode 100644
index 0000000..89d03ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long32-pic.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=o64 -mlong32 -fpic -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long32.c b/gcc/testsuite/gcc.target/mips/abi-o64-long32.c
new file mode 100644
index 0000000..db5893e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long32.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=o64 -mlong32 addressing=absolute -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long64-no-shared.c b/gcc/testsuite/gcc.target/mips/abi-o64-long64-no-shared.c
new file mode 100644
index 0000000..df164b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long64-no-shared.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=o64 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long64-pic.c b/gcc/testsuite/gcc.target/mips/abi-o64-long64-pic.c
new file mode 100644
index 0000000..df58d1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long64-pic.c
@@ -0,0 +1,3 @@
+/* { dg-options "-mabi=o64 -mlong64 -fpic -O2" } */
+/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/abi-o64-long64.c b/gcc/testsuite/gcc.target/mips/abi-o64-long64.c
new file mode 100644
index 0000000..8177f5a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/abi-o64-long64.c
@@ -0,0 +1,2 @@
+/* { dg-options "-mabi=o64 -mlong64 addressing=absolute -O2" } */
+#include "abi-main.h"
diff --git a/gcc/testsuite/gcc.target/mips/branch-10.c b/gcc/testsuite/gcc.target/mips/branch-10.c
index 7fdebfc..8186030 100644
--- a/gcc/testsuite/gcc.target/mips/branch-10.c
+++ b/gcc/testsuite/gcc.target/mips/branch-10.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32" } */
 /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-11.c b/gcc/testsuite/gcc.target/mips/branch-11.c
index 1c57f82..a314740 100644
--- a/gcc/testsuite/gcc.target/mips/branch-11.c
+++ b/gcc/testsuite/gcc.target/mips/branch-11.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32" } */
 /* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
 /* { dg-final { scan-assembler "\tld\t\\\$28," } } */
 /* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-12.c b/gcc/testsuite/gcc.target/mips/branch-12.c
index f1b6f1e..3e5b421 100644
--- a/gcc/testsuite/gcc.target/mips/branch-12.c
+++ b/gcc/testsuite/gcc.target/mips/branch-12.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64" } */
 /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-13.c b/gcc/testsuite/gcc.target/mips/branch-13.c
index cc0b607..9bd9414 100644
--- a/gcc/testsuite/gcc.target/mips/branch-13.c
+++ b/gcc/testsuite/gcc.target/mips/branch-13.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64" } */
 /* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
 /* { dg-final { scan-assembler "\tld\t\\\$28," } } */
 /* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-2.c b/gcc/testsuite/gcc.target/mips/branch-2.c
index 845e748..f6642cb 100644
--- a/gcc/testsuite/gcc.target/mips/branch-2.c
+++ b/gcc/testsuite/gcc.target/mips/branch-2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32" } */
 /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 /* { dg-final { scan-assembler-not "cprestore" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-3.c b/gcc/testsuite/gcc.target/mips/branch-3.c
index 0a4ffbb..198d6ec 100644
--- a/gcc/testsuite/gcc.target/mips/branch-3.c
+++ b/gcc/testsuite/gcc.target/mips/branch-3.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32" } */
 /* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
 /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
 /* { dg-final { scan-assembler-not "cprestore" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-4.c b/gcc/testsuite/gcc.target/mips/branch-4.c
index 277bd0a..31e4909 100644
--- a/gcc/testsuite/gcc.target/mips/branch-4.c
+++ b/gcc/testsuite/gcc.target/mips/branch-4.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32" } */
 /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-5.c b/gcc/testsuite/gcc.target/mips/branch-5.c
index 3d151d8..1e9c120 100644
--- a/gcc/testsuite/gcc.target/mips/branch-5.c
+++ b/gcc/testsuite/gcc.target/mips/branch-5.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32" } */
 /* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
 /* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
 /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-6.c b/gcc/testsuite/gcc.target/mips/branch-6.c
index 9bf73f0..77e0340 100644
--- a/gcc/testsuite/gcc.target/mips/branch-6.c
+++ b/gcc/testsuite/gcc.target/mips/branch-6.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64" } */
 /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-7.c b/gcc/testsuite/gcc.target/mips/branch-7.c
index 053ec61..8ad6808 100644
--- a/gcc/testsuite/gcc.target/mips/branch-7.c
+++ b/gcc/testsuite/gcc.target/mips/branch-7.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64" } */
 /* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
 /* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
 /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-8.c b/gcc/testsuite/gcc.target/mips/branch-8.c
index c2cbae3..4595fea 100644
--- a/gcc/testsuite/gcc.target/mips/branch-8.c
+++ b/gcc/testsuite/gcc.target/mips/branch-8.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32" } */
 /* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
 /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-9.c b/gcc/testsuite/gcc.target/mips/branch-9.c
index 2b83ea5..417507c 100644
--- a/gcc/testsuite/gcc.target/mips/branch-9.c
+++ b/gcc/testsuite/gcc.target/mips/branch-9.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mabicalls -mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32" } */
 /* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
 /* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */
 /* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$fp\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/lazy-binding-1.c b/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
index e85727c..e281a270 100644
--- a/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
+++ b/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mabicalls -mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */
+/* { dg-options "-mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */
 
 void bar (void);
 
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp
index 0535c48..5889902 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -850,6 +850,7 @@ proc mips-dg-options { args } {
     mips_option_dependency options "-mrelax-pic-calls" "-mexplicit-relocs"
     mips_option_dependency options "-fpic" "-mshared"
     mips_option_dependency options "-mshared" "-mno-plt"
+    mips_option_dependency options "-mshared" "-mabicalls"
     mips_option_dependency options "-mno-plt" "addressing=unknown"
     mips_option_dependency options "-mabicalls" "-G0"
     mips_option_dependency options "-mno-gpopt" "-mexplicit-relocs"