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| author | Roger Sayle <roger@nextmovesoftware.com> | 2023-07-22 21:52:55 +0100 |
|---|---|---|
| committer | Roger Sayle <roger@nextmovesoftware.com> | 2023-07-22 21:55:25 +0100 |
| commit | 8125b12f846b41f26e58c0fe3b218d654f65d1c8 (patch) | |
| tree | 84cb15ee4667b74e2c34a2c85ffd2c4613cc5670 | |
| parent | 659d856e1d424ea8ef634844a7bd08b86ec7344b (diff) | |
| download | gcc-8125b12f846b41f26e58c0fe3b218d654f65d1c8.zip gcc-8125b12f846b41f26e58c0fe3b218d654f65d1c8.tar.gz gcc-8125b12f846b41f26e58c0fe3b218d654f65d1c8.tar.bz2 | |
i386: Don't use insvti_{high,low}part with -O0 (for compile-time).
This patch attempts to help with PR rtl-optimization/110587, a regression
of -O0 compile time for the pathological pr28071.c. My recent patch helps
a bit, but hasn't returned -O0 compile-time to where it was before my
ix86_expand_move changes. The obvious solution/workaround is to guard
these new TImode parameter passing optimizations with "&& optimize", so
they don't trigger when compiling with -O0. The very minor complication
is that "&& optimize" alone leads to the regression of pr110533.c, where
our improved TImode parameter passing fixes a wrong-code issue with naked
functions, importantly, when compiling with -O0. This should explain
the one line fix below "&& (optimize || ix86_function_naked (cfun))".
I've an additional fix/tweak or two for this compile-time issue, but
this change eliminates the part of the regression that I've caused.
2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Disable the
64-bit insertions into TImode optimizations with -O0, unless
the function has the "naked" attribute (for PR target/110533).
| -rw-r--r-- | gcc/config/i386/i386-expand.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index a5c000f..0421909 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -544,6 +544,8 @@ ix86_expand_move (machine_mode mode, rtx operands[]) /* Special case inserting 64-bit values into a TImode register. */ if (TARGET_64BIT + /* Disable for -O0 (see PR110587) unless naked (PR110533). */ + && (optimize || ix86_function_naked (current_function_decl)) && (mode == DImode || mode == DFmode) && SUBREG_P (op0) && GET_MODE (SUBREG_REG (op0)) == TImode |