diff options
author | Alan Modra <amodra@bigpond.net.au> | 2004-01-08 15:13:23 +0000 |
---|---|---|
committer | Alan Modra <amodra@gcc.gnu.org> | 2004-01-09 01:43:23 +1030 |
commit | 7ddb6568e39aca91b2f817254449752c3490f3ed (patch) | |
tree | 0738a6663c426060c0e4177669659c319dac62c4 | |
parent | 2e89756b555877849e74a801f67a0f01282fea49 (diff) | |
download | gcc-7ddb6568e39aca91b2f817254449752c3490f3ed.zip gcc-7ddb6568e39aca91b2f817254449752c3490f3ed.tar.gz gcc-7ddb6568e39aca91b2f817254449752c3490f3ed.tar.bz2 |
linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Ensure target_flags has MASK_POWERPC64 when -m64.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Ensure
target_flags has MASK_POWERPC64 when -m64.
* config/rs6000/rs6000.c (processor_target_table): Add MASK_POWERPC64
to 620, 630, power3, power4 and rs64a entries.
* config/rs6000/rs6000.h (MASK_64BIT): Expand comment.
From-SVN: r75550
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/linux64.h | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 14 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 5 |
4 files changed, 28 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index aa0010d3..026920a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-01-09 Alan Modra <amodra@bigpond.net.au> + + * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Ensure + target_flags has MASK_POWERPC64 when -m64. + * config/rs6000/rs6000.c (processor_target_table): Add MASK_POWERPC64 + to 620, 630, power3, power4 and rs64a entries. + * config/rs6000/rs6000.h (MASK_64BIT): Expand comment. + 2004-01-08 Richard Sandiford <rsandifo@redhat.com> * simplify-rtx.c (simplify_immed_subreg): Fix construction of diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h index 338143c..d56c106 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -1,6 +1,7 @@ /* Definitions of target machine for GNU compiler, for 64 bit PowerPC linux. - Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. This file is part of GCC. @@ -89,6 +90,11 @@ target_flags &= ~MASK_PROTOTYPE; \ error (INVALID_64BIT, "prototype"); \ } \ + if ((target_flags & MASK_POWERPC64) == 0) \ + { \ + target_flags |= MASK_POWERPC64; \ + error ("-m64 requires a PowerPC64 cpu"); \ + } \ } \ else \ { \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index bef470f..32f4f2d 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -662,8 +662,10 @@ rs6000_override_options (const char *default_cpu) {"603e", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, {"604", PROCESSOR_PPC604, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, {"604e", PROCESSOR_PPC604e, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, - {"620", PROCESSOR_PPC620, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, - {"630", PROCESSOR_PPC630, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, + {"620", PROCESSOR_PPC620, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, + {"630", PROCESSOR_PPC630, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, {"740", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, {"7400", PROCESSOR_PPC7400, POWERPC_7400_MASK}, {"7450", PROCESSOR_PPC7450, POWERPC_7400_MASK}, @@ -684,8 +686,10 @@ rs6000_override_options (const char *default_cpu) {"power", PROCESSOR_POWER, MASK_POWER | MASK_MULTIPLE | MASK_STRING}, {"power2", PROCESSOR_POWER, MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING}, - {"power3", PROCESSOR_PPC630, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, - {"power4", PROCESSOR_POWER4, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, + {"power3", PROCESSOR_PPC630, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, + {"power4", PROCESSOR_POWER4, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, {"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK}, {"powerpc64", PROCESSOR_POWERPC64, POWERPC_BASE_MASK | MASK_POWERPC64}, @@ -695,7 +699,7 @@ rs6000_override_options (const char *default_cpu) MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING}, {"rsc", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING}, {"rsc1", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING}, - {"rs64a", PROCESSOR_RS64A, POWERPC_BASE_MASK}, + {"rs64a", PROCESSOR_RS64A, POWERPC_BASE_MASK | MASK_POWERPC64}, }; const size_t ptt_size = ARRAY_SIZE (processor_target_table); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 722fc84..f09c694 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -160,7 +160,10 @@ extern int target_flags; function, and one less allocable register. */ #define MASK_MINIMAL_TOC 0x00000200 -/* Nonzero for the 64bit model: longs and pointers are 64 bits. */ +/* Nonzero for the 64 bit ABIs: longs and pointers are 64 bits. The + chip is running in "64-bit mode", in which CR0 is set in dot + operations based on all 64 bits of the register, bdnz works on 64-bit + ctr, lr is 64 bits, and so on. Requires MASK_POWERPC64. */ #define MASK_64BIT 0x00000400 /* Disable use of FPRs. */ |