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| author | konglin1 <lingling.kong@intel.com> | 2021-10-19 09:35:30 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-10-25 16:01:14 +0800 |
| commit | 7c20a9b738a2257bed4e2b0593275336d1e2047a (patch) | |
| tree | 13410731f65a613f153592262c34da0b14053640 | |
| parent | 37935c01841ce47e989bbdeb567277b206d4ac76 (diff) | |
| download | gcc-7c20a9b738a2257bed4e2b0593275336d1e2047a.zip gcc-7c20a9b738a2257bed4e2b0593275336d1e2047a.tar.gz gcc-7c20a9b738a2257bed4e2b0593275336d1e2047a.tar.bz2 | |
Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B, C)) to FMA(B, C, A).
This patch is to support transform in fast-math something like
_mm512_add_ph(x1, _mm512_fmadd_pch(a, b, _mm512_setzero_ph())) to
_mm512_fmadd_pch(a, b, x1).
And support transform _mm512_add_ph(x1, _mm512_fmul_pch(a, b))
to _mm512_fmadd_pch(a, b, x1).
gcc/ChangeLog:
* config/i386/sse.md (fma_<mode>_fadd_fmul): Add new
define_insn_and_split.
(fma_<mode>_fadd_fcmul):Likewise
(fma_<complexopname>_<mode>_fma_zero):Likewise
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-complex-fma.c: New test.
| -rw-r--r-- | gcc/config/i386/sse.md | 52 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c | 18 |
2 files changed, 70 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f37c5c0..431236a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -5958,6 +5958,58 @@ [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) +(define_insn_and_split "fma_<mode>_fadd_fmul" + [(set (match_operand:VF_AVX512FP16VL 0 "register_operand") + (plus:VF_AVX512FP16VL + (unspec:VF_AVX512FP16VL + [(match_operand:VF_AVX512FP16VL 1 "vector_operand") + (match_operand:VF_AVX512FP16VL 2 "vector_operand")] + UNSPEC_COMPLEX_FMUL) + (match_operand:VF_AVX512FP16VL 3 "vector_operand")))] + "TARGET_AVX512FP16 && flag_unsafe_math_optimizations + && ix86_pre_reload_split ()" + "#" + "&& 1" + [(set (match_dup 0) + (unspec:VF_AVX512FP16VL + [(match_dup 1) (match_dup 2) (match_dup 3)] + UNSPEC_COMPLEX_FMA))]) + +(define_insn_and_split "fma_<mode>_fadd_fcmul" + [(set (match_operand:VF_AVX512FP16VL 0 "register_operand") + (plus:VF_AVX512FP16VL + (unspec:VF_AVX512FP16VL + [(match_operand:VF_AVX512FP16VL 1 "vector_operand") + (match_operand:VF_AVX512FP16VL 2 "vector_operand")] + UNSPEC_COMPLEX_FCMUL) + (match_operand:VF_AVX512FP16VL 3 "vector_operand")))] + "TARGET_AVX512FP16 && flag_unsafe_math_optimizations + && ix86_pre_reload_split ()" + "#" + "&& 1" + [(set (match_dup 0) + (unspec:VF_AVX512FP16VL + [(match_dup 1) (match_dup 2) (match_dup 3)] + UNSPEC_COMPLEX_FCMA))]) + +(define_insn_and_split "fma_<complexopname>_<mode>_fma_zero" + [(set (match_operand:VF_AVX512FP16VL 0 "register_operand") + (plus:VF_AVX512FP16VL + (unspec:VF_AVX512FP16VL + [(match_operand:VF_AVX512FP16VL 1 "vector_operand") + (match_operand:VF_AVX512FP16VL 2 "vector_operand") + (match_operand:VF_AVX512FP16VL 3 "const0_operand")] + UNSPEC_COMPLEX_F_C_MA) + (match_operand:VF_AVX512FP16VL 4 "vector_operand")))] + "TARGET_AVX512FP16 && flag_unsafe_math_optimizations + && ix86_pre_reload_split ()" + "#" + "&& 1" + [(set (match_dup 0) + (unspec:VF_AVX512FP16VL + [(match_dup 1) (match_dup 2) (match_dup 4)] + UNSPEC_COMPLEX_F_C_MA))]) + (define_insn "<avx512>_<complexopname>_<mode>_mask<round_name>" [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") (vec_merge:VF_AVX512FP16VL diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c b/gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c new file mode 100644 index 0000000..2dfd369 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2 -Ofast" } */ +/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-not "vaddph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"} } */ +/* { dg-final { scan-assembler-not "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"} } */ +/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ + +#include <immintrin.h> +volatile __m512h x1, x2, res, a, b; +void extern +avx512f_test (void) +{ + res = _mm512_add_ph (x1, _mm512_fmadd_pch (a, b, _mm512_setzero_ph())); + res = _mm512_add_ph (x1, _mm512_fcmadd_pch (a, b, _mm512_setzero_ph())); + + res = _mm512_add_ph (x1, _mm512_fmul_pch (a, b)); + res = _mm512_add_ph (x1, _mm512_fcmul_pch (a, b)); +} |