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authorJ"orn Rennecke <joern.rennecke@superh.com>2004-01-23 13:01:42 +0000
committerJoern Rennecke <amylaar@gcc.gnu.org>2004-01-23 13:01:42 +0000
commit7be4d808ffd3bb0bab32a4882fe7db2dd9aac379 (patch)
tree42529d1eb0ebe4cb9d1f1aaac576501e8e97de7d
parent3ac55a5a69f6a4f2f1acac66a36676c63c428db8 (diff)
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tm.texi: Insert some weasel words when LOAD_EXTEND_OP may or may not return non-NIL.
* doc/tm.texi: Insert some weasel words when LOAD_EXTEND_OP may or may not return non-NIL. * postreload.c (reload_cse_simplify_operands): In LOAD_EXTEND_OP code, check CANNOT_CHANGE_MODE_CLASS From-SVN: r76415
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/doc/tm.texi21
-rw-r--r--gcc/postreload.c9
3 files changed, 32 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0e66702..99f3135 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-01-23 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * doc/tm.texi: Insert some weasel words when LOAD_EXTEND_OP
+ may or may not return non-NIL.
+ * postreload.c (reload_cse_simplify_operands): In LOAD_EXTEND_OP code,
+ check CANNOT_CHANGE_MODE_CLASS
+
2004-01-23 Jan Hubicka <jh@suse.cz>
* basic-block.h (PROP_POSTRELOAD): New macro.
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index b3ac4c8..41f1fcb 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -8520,20 +8520,31 @@ smaller than a word are always performed on the entire register.
Most RISC machines have this property and most CISC machines do not.
@end defmac
-@defmac LOAD_EXTEND_OP (@var{mode})
+@defmac LOAD_EXTEND_OP (@var{mem_mode})
Define this macro to be a C expression indicating when insns that read
-memory in @var{mode}, an integral mode narrower than a word, set the
-bits outside of @var{mode} to be either the sign-extension or the
+memory in @var{mem_mode}, an integral mode narrower than a word, set the
+bits outside of @var{mem_mode} to be either the sign-extension or the
zero-extension of the data read. Return @code{SIGN_EXTEND} for values
-of @var{mode} for which the
+of @var{mem_mode} for which the
insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and
@code{NIL} for other modes.
-This macro is not called with @var{mode} non-integral or with a width
+This macro is not called with @var{mem_mode} non-integral or with a width
greater than or equal to @code{BITS_PER_WORD}, so you may return any
value in this case. Do not define this macro if it would always return
@code{NIL}. On machines where this macro is defined, you will normally
define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}.
+
+You may return a non-@code{NIL} value even if for some hard registers
+the sign extension is not performed, if for the @code{REGNO_REG_CLASS}
+of these hard registers @code{CANNOT_CHANGE_MODE_CLASS} returns nonzero
+when the @var{from} mode is @var{mem_mode} and the @var{to} mode is any
+integral mode larger than this but not larger than @code{word_mode}.
+
+You must return @code{NIL} if for some hard registers that allow this
+mode, @code{CANNOT_CHANGE_MODE_CLASS} says that they cannot change to
+@code{word_mode}, but that they can change to another integral mode that
+is larger then @var{mem_mode} but still smaller than @code{word_mode}.
@end defmac
@defmac SHORT_IMMEDIATES_SIGN_EXTEND
diff --git a/gcc/postreload.c b/gcc/postreload.c
index 5596d9c..6f567f0 100644
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -423,6 +423,15 @@ reload_cse_simplify_operands (rtx insn, rtx testreg)
|| GET_CODE (SET_SRC (set)) == ZERO_EXTEND
|| GET_CODE (SET_SRC (set)) == SIGN_EXTEND)
; /* Continue ordinary processing. */
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ /* If the register cannot change mode to word_mode, it follows that
+ it cannot have been used in word_mode. */
+ else if (GET_CODE (SET_DEST (set)) == REG
+ && CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)),
+ word_mode,
+ REGNO_REG_CLASS (REGNO (SET_DEST (set)))))
+ ; /* Continue ordinary processing. */
+#endif
/* If this is a straight load, make the extension explicit. */
else if (GET_CODE (SET_DEST (set)) == REG
&& recog_data.n_operands == 2