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| author | Roger Sayle <roger@nextmovesoftware.com> | 2023-12-31 21:37:24 +0000 |
|---|---|---|
| committer | Roger Sayle <roger@nextmovesoftware.com> | 2023-12-31 21:37:24 +0000 |
| commit | 79e1b23b91477b29deccf2cae92a7e8dd816c54a (patch) | |
| tree | f4b3d9afd1d3830e6aa0bb76a241ff1817564d3e | |
| parent | 26fe2808d8c9c4fccc9181af8c4cec5a766260a4 (diff) | |
| download | gcc-79e1b23b91477b29deccf2cae92a7e8dd816c54a.zip gcc-79e1b23b91477b29deccf2cae92a7e8dd816c54a.tar.gz gcc-79e1b23b91477b29deccf2cae92a7e8dd816c54a.tar.bz2 | |
i386: Tweak define_insn_and_split to fix FAIL of gcc.target/i386/pr43644-2.c
This patch resolves the failure of pr43644-2.c in the testsuite, a code
quality test I added back in July, that started failing as the code GCC
generates for 128-bit values (and their parameter passing) has been in
flux.
The function:
unsigned __int128 foo(unsigned __int128 x, unsigned long long y) {
return x+y;
}
currently generates:
foo: movq %rdx, %rcx
movq %rdi, %rax
movq %rsi, %rdx
addq %rcx, %rax
adcq $0, %rdx
ret
and with this patch, we now generate:
foo: movq %rdi, %rax
addq %rdx, %rax
movq %rsi, %rdx
adcq $0, %rdx
which is optimal.
2023-12-31 Uros Bizjak <ubizjak@gmail.com>
Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR target/43644
* config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Tweak
order of instructions after split, to minimize number of moves.
gcc/testsuite/ChangeLog
PR target/43644
* gcc.target/i386/pr43644-2.c: Expect 2 movq instructions.
| -rw-r--r-- | gcc/config/i386/i386.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr43644-2.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e693d93..b8e1df4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6411,13 +6411,13 @@ "#" "&& reload_completed" [(set (match_dup 0) (match_dup 4)) - (set (match_dup 5) (match_dup 2)) (parallel [(set (reg:CCC FLAGS_REG) (compare:CCC (plus:DWIH (match_dup 0) (match_dup 1)) (match_dup 0))) (set (match_dup 0) (plus:DWIH (match_dup 0) (match_dup 1)))]) + (set (match_dup 5) (match_dup 2)) (parallel [(set (match_dup 5) (plus:DWIH (plus:DWIH diff --git a/gcc/testsuite/gcc.target/i386/pr43644-2.c b/gcc/testsuite/gcc.target/i386/pr43644-2.c index d470b0a..3316ac6 100644 --- a/gcc/testsuite/gcc.target/i386/pr43644-2.c +++ b/gcc/testsuite/gcc.target/i386/pr43644-2.c @@ -6,4 +6,4 @@ unsigned __int128 foo(unsigned __int128 x, unsigned long long y) return x+y; } -/* { dg-final { scan-assembler-times "movq" 1 } } */ +/* { dg-final { scan-assembler-times "movq" 2 } } */ |