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| author | Jan Beulich <jbeulich@suse.com> | 2014-11-03 09:18:51 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@gcc.gnu.org> | 2014-11-03 09:18:51 +0000 |
| commit | 7629320a5362a2f0b3acf21bdd0a4dd39be21fc5 (patch) | |
| tree | 446a7c31bce0f8ea93e54eb28465be7f4567fd6f | |
| parent | b1c94de07fb4bf1a210b297c074d366f70fcfc20 (diff) | |
| download | gcc-7629320a5362a2f0b3acf21bdd0a4dd39be21fc5.zip gcc-7629320a5362a2f0b3acf21bdd0a4dd39be21fc5.tar.gz gcc-7629320a5362a2f0b3acf21bdd0a4dd39be21fc5.tar.bz2 | |
x86: extend vect-args testcase to AVX flavors
gcc/testsuite:
2014-11-03 Jan Beulich <jbeulich@suse.com>
* gcc.target/i386/i386.exp: Extend option set to test
vect-args.c with to include -mavx, -mavx2, and -mavx512f.
* gcc.target/i386/vect-args.c: Add AVX* modes and tests.
From-SVN: r217032
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/i386.exp | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/vect-args.c | 31 |
3 files changed, 39 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 62a1c88..06e9bee 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2014-11-03 Jan Beulich <jbeulich@suse.com> + + * gcc.target/i386/i386.exp: Extend option set to test + vect-args.c with to include -mavx, -mavx2, and -mavx512f. + * gcc.target/i386/vect-args.c: Add AVX* modes and tests. + 2014-11-03 Uros Bizjak <ubizjak@gmail.com> * gcc.c-torture/execute/20010129-1.c: Compile with -mtune=i686 diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.target/i386/i386.exp index 18b82b6..493a1f4 100644 --- a/gcc/testsuite/gcc.target/i386/i386.exp +++ b/gcc/testsuite/gcc.target/i386/i386.exp @@ -361,9 +361,9 @@ clearcap-init global runtests # Special case compilation of vect-args.c so we don't have to -# replicate it 10 times. +# replicate it 16 times. if [runtest_file_p $runtests $srcdir/$subdir/vect-args.c] { - foreach type { "" -mmmx -m3dnow -msse -msse2 } { + foreach type { "" -mmmx -m3dnow -msse -msse2 -mavx -mavx2 -mavx512f } { foreach level { "" -O } { set flags "$type $level" verbose -log "Testing vect-args, $flags" 1 diff --git a/gcc/testsuite/gcc.target/i386/vect-args.c b/gcc/testsuite/gcc.target/i386/vect-args.c index fc45889..02cf3f5 100644 --- a/gcc/testsuite/gcc.target/i386/vect-args.c +++ b/gcc/testsuite/gcc.target/i386/vect-args.c @@ -1,6 +1,22 @@ /* { dg-do compile } */ /* { dg-options "-w -Wno-psabi" } */ +/* AVX512F and AVX512BW modes. */ +typedef unsigned char V64QImode __attribute__((vector_size(64))); +typedef unsigned short V32HImode __attribute__((vector_size(64))); +typedef unsigned int V16SImode __attribute__((vector_size(64))); +typedef unsigned long long V8DImode __attribute__((vector_size(64))); +typedef float V16SFmode __attribute__((vector_size(64))); +typedef double V8DFmode __attribute__((vector_size(64))); + +/* AVX and AVX2 modes. */ +typedef unsigned char V32QImode __attribute__((vector_size(32))); +typedef unsigned short V16HImode __attribute__((vector_size(32))); +typedef unsigned int V8SImode __attribute__((vector_size(32))); +typedef unsigned long long V4DImode __attribute__((vector_size(32))); +typedef float V8SFmode __attribute__((vector_size(32))); +typedef double V4DFmode __attribute__((vector_size(32))); + /* SSE1 and SSE2 modes. */ typedef unsigned char V16QImode __attribute__((vector_size(16))); typedef unsigned short V8HImode __attribute__((vector_size(16))); @@ -21,12 +37,27 @@ extern TYPE data_##TYPE; \ void r_##TYPE (TYPE x) { data_##TYPE = x; } \ void s_##TYPE (void) { r_##TYPE (data_##TYPE); } +TEST(V64QImode) +TEST(V32HImode) +TEST(V16SImode) +TEST(V8DImode) +TEST(V16SFmode) +TEST(V8DFmode) + +TEST(V32QImode) +TEST(V16HImode) +TEST(V8SImode) +TEST(V4DImode) +TEST(V8SFmode) +TEST(V4DFmode) + TEST(V16QImode) TEST(V8HImode) TEST(V4SImode) TEST(V2DImode) TEST(V4SFmode) TEST(V2DFmode) + TEST(V8QImode) TEST(V4HImode) TEST(V2SImode) |