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author | Hans-Peter Nilsson <hp@axis.com> | 2008-04-13 00:51:51 +0000 |
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committer | Hans-Peter Nilsson <hp@gcc.gnu.org> | 2008-04-13 00:51:51 +0000 |
commit | 70a7c7f11f253b8b38f2450c6f9727e1cda235c2 (patch) | |
tree | 6fe5df6d85db378bce71b2007436862b97929077 | |
parent | e5043f5f930af6669ae27c9a7e436c7226201061 (diff) | |
download | gcc-70a7c7f11f253b8b38f2450c6f9727e1cda235c2.zip gcc-70a7c7f11f253b8b38f2450c6f9727e1cda235c2.tar.gz gcc-70a7c7f11f253b8b38f2450c6f9727e1cda235c2.tar.bz2 |
* config/cris/cris.md ("*andhi_lowpart_non_v32", "*andhi_lowpart_v32")
("*andqi_lowpart_non_v32", "*andqi_lowpart_v32"): Use "+" for the
operand 0 constraint, not "=".
From-SVN: r134236
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/cris/cris.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fa39283..69cb7f2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2008-04-13 Hans-Peter Nilsson <hp@axis.com> + + * config/cris/cris.md ("*andhi_lowpart_non_v32", "*andhi_lowpart_v32") + ("*andqi_lowpart_non_v32", "*andqi_lowpart_v32"): Use "+" for the + operand 0 constraint, not "=". + 2008-04-11 James E. Wilson <wilson@tuliptree.org> * system.h: Change ASSERT_CHECKING to ENABLE_ASSERT_CHECKING. diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 1200a22..97353cd 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -2958,7 +2958,7 @@ (define_insn "*andhi_lowpart_non_v32" [(set (strict_low_part - (match_operand:HI 0 "register_operand" "=r,r, r,r,r,r")) + (match_operand:HI 0 "register_operand" "+r,r, r,r,r,r")) (and:HI (match_operand:HI 1 "register_operand" "%0,0, 0,0,0,r") (match_operand:HI 2 "general_operand" "r,Q>,L,O,g,!To")))] "!TARGET_V32" @@ -2974,7 +2974,7 @@ (define_insn "*andhi_lowpart_v32" [(set (strict_low_part - (match_operand:HI 0 "register_operand" "=r,r,r,r,r")) + (match_operand:HI 0 "register_operand" "+r,r,r,r,r")) (and:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0") (match_operand:HI 2 "general_operand" "r,Q>,L,O,g")))] "TARGET_V32" @@ -3025,7 +3025,7 @@ (define_insn "*andqi_lowpart_non_v32" [(set (strict_low_part - (match_operand:QI 0 "register_operand" "=r,r, r,r,r")) + (match_operand:QI 0 "register_operand" "+r,r, r,r,r")) (and:QI (match_operand:QI 1 "register_operand" "%0,0, 0,0,r") (match_operand:QI 2 "general_operand" "r,Q>,O,g,!To")))] "!TARGET_V32" @@ -3040,7 +3040,7 @@ (define_insn "*andqi_lowpart_v32" [(set (strict_low_part - (match_operand:QI 0 "register_operand" "=r,r,r,r")) + (match_operand:QI 0 "register_operand" "+r,r,r,r")) (and:QI (match_operand:QI 1 "register_operand" "%0,0,0,0") (match_operand:QI 2 "general_operand" "r,Q>,O,g")))] "TARGET_V32" |