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| author | Andrew Stubbs <ams@codesourcery.com> | 2022-07-19 11:14:28 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2022-07-29 13:01:34 +0100 |
| commit | 6e0ca3fe88d8f98ba6b4009c9483e87afbcf4ee8 (patch) | |
| tree | c022f06d4f3003fbeb03d4f69821027950609930 | |
| parent | 8f4d9c1dedac54942ad28cc1647d48959bec9e77 (diff) | |
| download | gcc-6e0ca3fe88d8f98ba6b4009c9483e87afbcf4ee8.zip gcc-6e0ca3fe88d8f98ba6b4009c9483e87afbcf4ee8.tar.gz gcc-6e0ca3fe88d8f98ba6b4009c9483e87afbcf4ee8.tar.bz2 | |
amdgcn: 64-bit vector shifts
Enable 64-bit vector-vector and vector-scalar shifts.
gcc/ChangeLog:
* config/gcn/gcn-valu.md (V_INT_noHI): New iterator.
(<expander><mode>3<exec>): Use V_INT_noHI.
(v<expander><mode>3<exec>): Likewise.
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index abe4620..8c33ae0 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -60,6 +60,8 @@ (define_mode_iterator V_INT_noQI [V64HI V64SI V64DI]) +(define_mode_iterator V_INT_noHI + [V64SI V64DI]) ; All of above (define_mode_iterator V_ALL @@ -2086,10 +2088,10 @@ }) (define_insn "<expander><mode>3<exec>" - [(set (match_operand:V_SI 0 "register_operand" "= v") - (shiftop:V_SI - (match_operand:V_SI 1 "gcn_alu_operand" " v") - (vec_duplicate:V_SI + [(set (match_operand:V_INT_noHI 0 "register_operand" "= v") + (shiftop:V_INT_noHI + (match_operand:V_INT_noHI 1 "gcn_alu_operand" " v") + (vec_duplicate:<VnSI> (match_operand:SI 2 "gcn_alu_operand" "SvB"))))] "" "v_<revmnemonic>0\t%0, %2, %1" @@ -2117,10 +2119,10 @@ }) (define_insn "v<expander><mode>3<exec>" - [(set (match_operand:V_SI 0 "register_operand" "=v") - (shiftop:V_SI - (match_operand:V_SI 1 "gcn_alu_operand" " v") - (match_operand:V_SI 2 "gcn_alu_operand" "vB")))] + [(set (match_operand:V_INT_noHI 0 "register_operand" "=v") + (shiftop:V_INT_noHI + (match_operand:V_INT_noHI 1 "gcn_alu_operand" " v") + (match_operand:<VnSI> 2 "gcn_alu_operand" "vB")))] "" "v_<revmnemonic>0\t%0, %2, %1" [(set_attr "type" "vop2") |