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authorRichard Sandiford <richard.sandiford@arm.com>2023-05-09 18:57:23 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-05-09 18:57:23 +0100
commit6d25ea520f7ed58568c9a0031409bc8e38b673f3 (patch)
tree1613262c14fc3afb7893b713af6ab2362a63a9e0
parent84684d2c3932e4b778f49bd06f257d74bdfee470 (diff)
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aarch64: Improve register allocation for lane instructions
REG_ALLOC_ORDER is much less important than it used to be, but it is still used as a tie-breaker when multiple registers in a class are equally good. Previously aarch64 used the default approach of allocating in order of increasing register number. But as the comment in the patch says, it's better to allocate FP and predicate registers in the opposite order, so that we don't eat into smaller register classes unnecessarily. This fixes some existing FIXMEs and improves the register allocation for some Arm ACLE code. Doing this also showed that *vcond_mask_<mode><vpred> (predicated MOV/SEL) unnecessarily required p0-p7 rather than p0-p15 for the unpredicated movprfx alternatives. Only the predicated movprfx alternative requires p0-p7 (due to the movprfx itself, rather than due to the main instruction). gcc/ * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order): Declare. * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define. (ADJUST_REG_ALLOC_ORDER): Likewise. * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New function. * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use Upa rather than Upl for unpredicated movprfx alternatives. gcc/testsuite/ * gcc.target/aarch64/sve/acle/asm/abd_f16.c: Remove XFAILs. * gcc.target/aarch64/sve/acle/asm/abd_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/abd_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/add_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/and_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/asr_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/asr_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/bic_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/div_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/divr_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/dot_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/dot_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/dot_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/dot_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/eor_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsr_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsr_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mad_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/max_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/min_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mla_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mls_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/msb_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f16_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f32_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_f64_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mul_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulh_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulx_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulx_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/mulx_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmad_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmad_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmad_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmla_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmla_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmla_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmls_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmls_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmls_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmsb_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmsb_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/nmsb_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/orr_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/scale_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/scale_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/scale_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/sub_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f16_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f32_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_f64_notrap.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/subr_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_s8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_u16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/bcax_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_s8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_u16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qadd_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalb_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalb_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalb_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_s8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_u16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsub_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_s8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_u16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c: Likewise.
-rw-r--r--gcc/config/aarch64/aarch64-protos.h2
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-rw-r--r--gcc/config/aarch64/aarch64.cc38
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-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s8.c4
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-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s32.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s64.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s8.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u16.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u32.c2
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-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u8.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s16.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s32.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s64.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s8.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u16.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u32.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u64.c2
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-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c4
251 files changed, 413 insertions, 368 deletions
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index b138494..2f055a2 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1067,4 +1067,6 @@ extern bool aarch64_harden_sls_blr_p (void);
extern void aarch64_output_patchable_area (unsigned int, bool);
+extern void aarch64_adjust_reg_alloc_order ();
+
#endif /* GCC_AARCH64_PROTOS_H */
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index 4b4c02c..2898b85 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -7624,7 +7624,7 @@
(define_insn "*vcond_mask_<mode><vpred>"
[(set (match_operand:SVE_ALL 0 "register_operand" "=w, w, w, w, ?w, ?&w, ?&w")
(unspec:SVE_ALL
- [(match_operand:<VPRED> 3 "register_operand" "Upa, Upa, Upa, Upa, Upl, Upl, Upl")
+ [(match_operand:<VPRED> 3 "register_operand" "Upa, Upa, Upa, Upa, Upl, Upa, Upa")
(match_operand:SVE_ALL 1 "aarch64_sve_reg_or_dup_imm" "w, vss, vss, Ufc, Ufc, vss, Ufc")
(match_operand:SVE_ALL 2 "aarch64_simd_reg_or_zero" "w, 0, Dz, 0, Dz, w, w")]
UNSPEC_SEL))]
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 546cb12..bf3d1b3 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -27501,6 +27501,44 @@ aarch64_output_load_tp (rtx dest)
return "";
}
+/* Set up the value of REG_ALLOC_ORDER from scratch.
+
+ It was previously good practice to put call-clobbered registers ahead
+ of call-preserved registers, but that isn't necessary these days.
+ IRA's model of register save/restore costs is much more sophisticated
+ than the model that a simple ordering could provide. We leave
+ HONOR_REG_ALLOC_ORDER undefined so that we can get the full benefit
+ of IRA's model.
+
+ However, it is still useful to list registers that are members of
+ multiple classes after registers that are members of fewer classes.
+ For example, we have:
+
+ - FP_LO8_REGS: v0-v7
+ - FP_LO_REGS: v0-v15
+ - FP_REGS: v0-v31
+
+ If, as a tie-breaker, we allocate FP_REGS in the order v0-v31,
+ we run the risk of starving other (lower-priority) pseudos that
+ require FP_LO8_REGS or FP_LO_REGS. Allocating FP_LO_REGS in the
+ order v0-v15 could similarly starve pseudos that require FP_LO8_REGS.
+ Allocating downwards rather than upwards avoids this problem, at least
+ in code that has reasonable register pressure.
+
+ The situation for predicate registers is similar. */
+
+void
+aarch64_adjust_reg_alloc_order ()
+{
+ for (int i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
+ if (IN_RANGE (i, V0_REGNUM, V31_REGNUM))
+ reg_alloc_order[i] = V31_REGNUM - (i - V0_REGNUM);
+ else if (IN_RANGE (i, P0_REGNUM, P15_REGNUM))
+ reg_alloc_order[i] = P15_REGNUM - (i - P0_REGNUM);
+ else
+ reg_alloc_order[i] = i;
+}
+
/* Target-specific selftests. */
#if CHECKING_P
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 155cace..801f9eb 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -1292,4 +1292,9 @@ extern poly_uint16 aarch64_sve_vg;
STACK_BOUNDARY / BITS_PER_UNIT) \
: (crtl->outgoing_args_size + STACK_POINTER_OFFSET))
+/* Filled in by aarch64_adjust_reg_alloc_order, which is called before
+ the first relevant use. */
+#define REG_ALLOC_ORDER {}
+#define ADJUST_REG_ALLOC_ORDER aarch64_adjust_reg_alloc_order ()
+
#endif /* GCC_AARCH64_H */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f16.c
index c019f24..e84df04 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f16.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_f16_m_tied1, svfloat16_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_f16_m_untied: { xfail *-*-* }
+** abd_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fabd z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f32.c
index bff3758..f2fcb34 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_f32_m_tied1, svfloat32_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_f32_m_untied: { xfail *-*-* }
+** abd_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fabd z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f64.c
index c1e5f14..952bd46 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_f64_m_tied1, svfloat64_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_f64_m_untied: { xfail *-*-* }
+** abd_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fabd z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s16.c
index e2d0c0f..7d055eb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (abd_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svabd_m (p0, z0, x0))
/*
-** abd_w0_s16_m_untied: { xfail *-*-* }
+** abd_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sabd z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_s16_m_tied1, svint16_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_s16_m_untied: { xfail *-*-* }
+** abd_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** sabd z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s32.c
index 5c95ec0..2489b24 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_s32_m_tied1, svint32_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_s32_m_untied: { xfail *-*-* }
+** abd_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** sabd z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s64.c
index 2402ecf..0d324c9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_s64_m_tied1, svint64_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_s64_m_untied: { xfail *-*-* }
+** abd_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** sabd z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s8.c
index 49a2cc3..51e4a8a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (abd_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svabd_m (p0, z0, x0))
/*
-** abd_w0_s8_m_untied: { xfail *-*-* }
+** abd_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sabd z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_s8_m_tied1, svint8_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_s8_m_untied: { xfail *-*-* }
+** abd_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** sabd z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u16.c
index 60aa9429..89dc58d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (abd_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svabd_m (p0, z0, x0))
/*
-** abd_w0_u16_m_untied: { xfail *-*-* }
+** abd_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** uabd z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_u16_m_tied1, svuint16_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_u16_m_untied: { xfail *-*-* }
+** abd_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** uabd z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u32.c
index bc24107..4e4d0bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_u32_m_tied1, svuint32_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_u32_m_untied: { xfail *-*-* }
+** abd_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** uabd z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u64.c
index d2cdaa0..2aa9937 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_u64_m_tied1, svuint64_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_u64_m_untied: { xfail *-*-* }
+** abd_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** uabd z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u8.c
index 454ef15..78a1632 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/abd_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (abd_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svabd_m (p0, z0, x0))
/*
-** abd_w0_u8_m_untied: { xfail *-*-* }
+** abd_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** uabd z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (abd_1_u8_m_tied1, svuint8_t,
z0 = svabd_m (p0, z0, 1))
/*
-** abd_1_u8_m_untied: { xfail *-*-* }
+** abd_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** uabd z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s16.c
index c0883ed..85a63f3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (add_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svadd_m (p0, z0, x0))
/*
-** add_w0_s16_m_untied: { xfail *-*-* }
+** add_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_s16_m_tied1, svint16_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_s16_m_untied: { xfail *-*-* }
+** add_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s32.c
index 887038b..4ba210c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_s32_m_tied1, svint32_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_s32_m_untied: { xfail *-*-* }
+** add_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** add z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s64.c
index aab63ef..ff8cc6d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_s64_m_tied1, svint64_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_s64_m_untied: { xfail *-*-* }
+** add_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** add z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s8.c
index 0889c18..2e79ba2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (add_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svadd_m (p0, z0, x0))
/*
-** add_w0_s8_m_untied: { xfail *-*-* }
+** add_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_s8_m_tied1, svint8_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_s8_m_untied: { xfail *-*-* }
+** add_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u16.c
index 25cb903..85880c8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (add_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svadd_m (p0, z0, x0))
/*
-** add_w0_u16_m_untied: { xfail *-*-* }
+** add_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_u16_m_tied1, svuint16_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_u16_m_untied: { xfail *-*-* }
+** add_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u32.c
index ee97948..74dfe0c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_u32_m_tied1, svuint32_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_u32_m_untied: { xfail *-*-* }
+** add_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** add z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u64.c
index 25d2972..efb8820 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_u64_m_tied1, svuint64_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_u64_m_untied: { xfail *-*-* }
+** add_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** add z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u8.c
index 06b68c9..812c6a5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/add_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (add_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svadd_m (p0, z0, x0))
/*
-** add_w0_u8_m_untied: { xfail *-*-* }
+** add_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (add_1_u8_m_tied1, svuint8_t,
z0 = svadd_m (p0, z0, 1))
/*
-** add_1_u8_m_untied: { xfail *-*-* }
+** add_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s16.c
index d54613e..02d830a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (and_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svand_m (p0, z0, x0))
/*
-** and_w0_s16_m_untied: { xfail *-*-* }
+** and_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_s16_m_tied1, svint16_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_s16_m_untied: { xfail *-*-* }
+** and_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s32.c
index 7f4082b..c78c186 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_s32_m_tied1, svint32_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_s32_m_untied: { xfail *-*-* }
+** and_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** and z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s64.c
index 8868258..8ef1f63 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_s64_m_tied1, svint64_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_s64_m_untied: { xfail *-*-* }
+** and_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** and z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s8.c
index 61d168d..a2856cd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (and_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svand_m (p0, z0, x0))
/*
-** and_w0_s8_m_untied: { xfail *-*-* }
+** and_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_s8_m_tied1, svint8_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_s8_m_untied: { xfail *-*-* }
+** and_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u16.c
index 875a08d..443a2a8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (and_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svand_m (p0, z0, x0))
/*
-** and_w0_u16_m_untied: { xfail *-*-* }
+** and_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_u16_m_tied1, svuint16_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_u16_m_untied: { xfail *-*-* }
+** and_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u32.c
index 80ff503..07d251e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_u32_m_tied1, svuint32_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_u32_m_untied: { xfail *-*-* }
+** and_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** and z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u64.c
index 906b19c..5e2ee4d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_u64_m_tied1, svuint64_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_u64_m_untied: { xfail *-*-* }
+** and_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** and z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u8.c
index b0f1c95..373aafe 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/and_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (and_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svand_m (p0, z0, x0))
/*
-** and_w0_u8_m_untied: { xfail *-*-* }
+** and_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (and_1_u8_m_tied1, svuint8_t,
z0 = svand_m (p0, z0, 1))
/*
-** and_1_u8_m_untied: { xfail *-*-* }
+** and_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s16.c
index 877bf10..f9ce790 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (asr_w0_s16_m_tied1, svint16_t, uint16_t,
z0 = svasr_m (p0, z0, x0))
/*
-** asr_w0_s16_m_untied: { xfail *-*-* }
+** asr_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** asr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s8.c
index 992e93f..5cf3a71 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/asr_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (asr_w0_s8_m_tied1, svint8_t, uint8_t,
z0 = svasr_m (p0, z0, x0))
/*
-** asr_w0_s8_m_untied: { xfail *-*-* }
+** asr_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** asr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s16.c
index c80f569..79848b1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (bic_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svbic_m (p0, z0, x0))
/*
-** bic_w0_s16_m_untied: { xfail *-*-* }
+** bic_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** bic z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_s16_m_tied1, svint16_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_s16_m_untied: { xfail *-*-* }
+** bic_1_s16_m_untied:
** mov (z[0-9]+\.h), #-2
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
@@ -127,7 +127,7 @@ TEST_UNIFORM_ZX (bic_w0_s16_z_tied1, svint16_t, int16_t,
z0 = svbic_z (p0, z0, x0))
/*
-** bic_w0_s16_z_untied: { xfail *-*-* }
+** bic_w0_s16_z_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0\.h, p0/z, z1\.h
** bic z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s32.c
index e02c669..04367a8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_s32_m_tied1, svint32_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_s32_m_untied: { xfail *-*-* }
+** bic_1_s32_m_untied:
** mov (z[0-9]+\.s), #-2
** movprfx z0, z1
** and z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s64.c
index 57c1e53..b4c19d1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_s64_m_tied1, svint64_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_s64_m_untied: { xfail *-*-* }
+** bic_1_s64_m_untied:
** mov (z[0-9]+\.d), #-2
** movprfx z0, z1
** and z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s8.c
index 0958a34..d1ffefa 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (bic_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svbic_m (p0, z0, x0))
/*
-** bic_w0_s8_m_untied: { xfail *-*-* }
+** bic_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** bic z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_s8_m_tied1, svint8_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_s8_m_untied: { xfail *-*-* }
+** bic_1_s8_m_untied:
** mov (z[0-9]+\.b), #-2
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
@@ -127,7 +127,7 @@ TEST_UNIFORM_ZX (bic_w0_s8_z_tied1, svint8_t, int8_t,
z0 = svbic_z (p0, z0, x0))
/*
-** bic_w0_s8_z_untied: { xfail *-*-* }
+** bic_w0_s8_z_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0\.b, p0/z, z1\.b
** bic z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u16.c
index 30209ff..fb16646 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (bic_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svbic_m (p0, z0, x0))
/*
-** bic_w0_u16_m_untied: { xfail *-*-* }
+** bic_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** bic z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_u16_m_tied1, svuint16_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_u16_m_untied: { xfail *-*-* }
+** bic_1_u16_m_untied:
** mov (z[0-9]+\.h), #-2
** movprfx z0, z1
** and z0\.h, p0/m, z0\.h, \1
@@ -127,7 +127,7 @@ TEST_UNIFORM_ZX (bic_w0_u16_z_tied1, svuint16_t, uint16_t,
z0 = svbic_z (p0, z0, x0))
/*
-** bic_w0_u16_z_untied: { xfail *-*-* }
+** bic_w0_u16_z_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0\.h, p0/z, z1\.h
** bic z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u32.c
index 9f08ab4..764fd19 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_u32_m_tied1, svuint32_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_u32_m_untied: { xfail *-*-* }
+** bic_1_u32_m_untied:
** mov (z[0-9]+\.s), #-2
** movprfx z0, z1
** and z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u64.c
index de84f3a..e439980 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_u64_m_tied1, svuint64_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_u64_m_untied: { xfail *-*-* }
+** bic_1_u64_m_untied:
** mov (z[0-9]+\.d), #-2
** movprfx z0, z1
** and z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u8.c
index 80c489b..b7528ce 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bic_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (bic_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svbic_m (p0, z0, x0))
/*
-** bic_w0_u8_m_untied: { xfail *-*-* }
+** bic_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** bic z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (bic_1_u8_m_tied1, svuint8_t,
z0 = svbic_m (p0, z0, 1))
/*
-** bic_1_u8_m_untied: { xfail *-*-* }
+** bic_1_u8_m_untied:
** mov (z[0-9]+\.b), #-2
** movprfx z0, z1
** and z0\.b, p0/m, z0\.b, \1
@@ -127,7 +127,7 @@ TEST_UNIFORM_ZX (bic_w0_u8_z_tied1, svuint8_t, uint8_t,
z0 = svbic_z (p0, z0, x0))
/*
-** bic_w0_u8_z_untied: { xfail *-*-* }
+** bic_w0_u8_z_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0\.b, p0/z, z1\.b
** bic z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f16.c
index 8bcd094..90f93643 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f16.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_1_f16_m_tied1, svfloat16_t,
z0 = svdiv_m (p0, z0, 1))
/*
-** div_1_f16_m_untied: { xfail *-*-* }
+** div_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdiv z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f32.c
index 546c61d..7c1894e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_1_f32_m_tied1, svfloat32_t,
z0 = svdiv_m (p0, z0, 1))
/*
-** div_1_f32_m_untied: { xfail *-*-* }
+** div_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdiv z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f64.c
index 1e24bc26..93517c5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_1_f64_m_tied1, svfloat64_t,
z0 = svdiv_m (p0, z0, 1))
/*
-** div_1_f64_m_untied: { xfail *-*-* }
+** div_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdiv z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s32.c
index 8e70ae7..c49ca1a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_2_s32_m_tied1, svint32_t,
z0 = svdiv_m (p0, z0, 2))
/*
-** div_2_s32_m_untied: { xfail *-*-* }
+** div_2_s32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** sdiv z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s64.c
index 439da1f..464dca2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_2_s64_m_tied1, svint64_t,
z0 = svdiv_m (p0, z0, 2))
/*
-** div_2_s64_m_untied: { xfail *-*-* }
+** div_2_s64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** sdiv z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u32.c
index 8e8e464..232ccac 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_2_u32_m_tied1, svuint32_t,
z0 = svdiv_m (p0, z0, 2))
/*
-** div_2_u32_m_untied: { xfail *-*-* }
+** div_2_u32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** udiv z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u64.c
index fc152e8..ac7c026 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/div_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (div_2_u64_m_tied1, svuint64_t,
z0 = svdiv_m (p0, z0, 2))
/*
-** div_2_u64_m_untied: { xfail *-*-* }
+** div_2_u64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** udiv z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f16.c
index e293be6..ad6eb65 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f16.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_1_f16_m_tied1, svfloat16_t,
z0 = svdivr_m (p0, z0, 1))
/*
-** divr_1_f16_m_untied: { xfail *-*-* }
+** divr_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdivr z0\.h, p0/m, z0\.h, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (divr_0p5_f16_m_tied1, svfloat16_t,
z0 = svdivr_m (p0, z0, 0.5))
/*
-** divr_0p5_f16_m_untied: { xfail *-*-* }
+** divr_0p5_f16_m_untied:
** fmov (z[0-9]+\.h), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fdivr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f32.c
index 04a7ac4..60fd707 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_1_f32_m_tied1, svfloat32_t,
z0 = svdivr_m (p0, z0, 1))
/*
-** divr_1_f32_m_untied: { xfail *-*-* }
+** divr_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdivr z0\.s, p0/m, z0\.s, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (divr_0p5_f32_m_tied1, svfloat32_t,
z0 = svdivr_m (p0, z0, 0.5))
/*
-** divr_0p5_f32_m_untied: { xfail *-*-* }
+** divr_0p5_f32_m_untied:
** fmov (z[0-9]+\.s), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fdivr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f64.c
index bef1a9b..f465a27 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_1_f64_m_tied1, svfloat64_t,
z0 = svdivr_m (p0, z0, 1))
/*
-** divr_1_f64_m_untied: { xfail *-*-* }
+** divr_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fdivr z0\.d, p0/m, z0\.d, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (divr_0p5_f64_m_tied1, svfloat64_t,
z0 = svdivr_m (p0, z0, 0.5))
/*
-** divr_0p5_f64_m_untied: { xfail *-*-* }
+** divr_0p5_f64_m_untied:
** fmov (z[0-9]+\.d), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fdivr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s32.c
index 75a6c1d..dab18b0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_2_s32_m_tied1, svint32_t,
z0 = svdivr_m (p0, z0, 2))
/*
-** divr_2_s32_m_untied: { xfail *-*-* }
+** divr_2_s32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** sdivr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s64.c
index 8f4939a..4668437 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_2_s64_m_tied1, svint64_t,
z0 = svdivr_m (p0, z0, 2))
/*
-** divr_2_s64_m_untied: { xfail *-*-* }
+** divr_2_s64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** sdivr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u32.c
index 84c243b..c6d4b04 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_2_u32_m_tied1, svuint32_t,
z0 = svdivr_m (p0, z0, 2))
/*
-** divr_2_u32_m_untied: { xfail *-*-* }
+** divr_2_u32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** udivr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u64.c
index 03bb624..ace600a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/divr_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (divr_2_u64_m_tied1, svuint64_t,
z0 = svdivr_m (p0, z0, 2))
/*
-** divr_2_u64_m_untied: { xfail *-*-* }
+** divr_2_u64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** udivr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s32.c
index 605bd1b..0d9d6afe 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s32.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (dot_w0_s32_tied1, svint32_t, svint8_t, int8_t,
z0 = svdot (z0, z4, x0))
/*
-** dot_w0_s32_untied: { xfail *-*-* }
+** dot_w0_s32_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sdot z0\.s, z4\.b, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (dot_9_s32_tied1, svint32_t, svint8_t,
z0 = svdot (z0, z4, 9))
/*
-** dot_9_s32_untied: { xfail *-*-* }
+** dot_9_s32_untied:
** mov (z[0-9]+\.b), #9
** movprfx z0, z1
** sdot z0\.s, z4\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s64.c
index b657474..a119d9c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_s64.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (dot_w0_s64_tied1, svint64_t, svint16_t, int16_t,
z0 = svdot (z0, z4, x0))
/*
-** dot_w0_s64_untied: { xfail *-*-* }
+** dot_w0_s64_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sdot z0\.d, z4\.h, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (dot_9_s64_tied1, svint64_t, svint16_t,
z0 = svdot (z0, z4, 9))
/*
-** dot_9_s64_untied: { xfail *-*-* }
+** dot_9_s64_untied:
** mov (z[0-9]+\.h), #9
** movprfx z0, z1
** sdot z0\.d, z4\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u32.c
index 541e71c..3e57074 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u32.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (dot_w0_u32_tied1, svuint32_t, svuint8_t, uint8_t,
z0 = svdot (z0, z4, x0))
/*
-** dot_w0_u32_untied: { xfail *-*-* }
+** dot_w0_u32_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** udot z0\.s, z4\.b, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (dot_9_u32_tied1, svuint32_t, svuint8_t,
z0 = svdot (z0, z4, 9))
/*
-** dot_9_u32_untied: { xfail *-*-* }
+** dot_9_u32_untied:
** mov (z[0-9]+\.b), #9
** movprfx z0, z1
** udot z0\.s, z4\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u64.c
index cc0e853..88d9047 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dot_u64.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (dot_w0_u64_tied1, svuint64_t, svuint16_t, uint16_t,
z0 = svdot (z0, z4, x0))
/*
-** dot_w0_u64_untied: { xfail *-*-* }
+** dot_w0_u64_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** udot z0\.d, z4\.h, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (dot_9_u64_tied1, svuint64_t, svuint16_t,
z0 = svdot (z0, z4, 9))
/*
-** dot_9_u64_untied: { xfail *-*-* }
+** dot_9_u64_untied:
** mov (z[0-9]+\.h), #9
** movprfx z0, z1
** udot z0\.d, z4\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s16.c
index 7cf7360..683248d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (eor_w0_s16_m_tied1, svint16_t, int16_t,
z0 = sveor_m (p0, z0, x0))
/*
-** eor_w0_s16_m_untied: { xfail *-*-* }
+** eor_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** eor z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_s16_m_tied1, svint16_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_s16_m_untied: { xfail *-*-* }
+** eor_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** eor z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s32.c
index d5aecb2..4c3ba9a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_s32_m_tied1, svint32_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_s32_m_untied: { xfail *-*-* }
+** eor_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** eor z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s64.c
index 1571289..83817cc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_s64_m_tied1, svint64_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_s64_m_untied: { xfail *-*-* }
+** eor_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** eor z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s8.c
index 083ac2d..91f3ea8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (eor_w0_s8_m_tied1, svint8_t, int8_t,
z0 = sveor_m (p0, z0, x0))
/*
-** eor_w0_s8_m_untied: { xfail *-*-* }
+** eor_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** eor z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_s8_m_tied1, svint8_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_s8_m_untied: { xfail *-*-* }
+** eor_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** eor z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u16.c
index 40b43a5..875b8d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (eor_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = sveor_m (p0, z0, x0))
/*
-** eor_w0_u16_m_untied: { xfail *-*-* }
+** eor_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** eor z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_u16_m_tied1, svuint16_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_u16_m_untied: { xfail *-*-* }
+** eor_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** eor z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u32.c
index 8e46d08..6add2b7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_u32_m_tied1, svuint32_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_u32_m_untied: { xfail *-*-* }
+** eor_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** eor z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u64.c
index a82398f..ee0bda2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_u64_m_tied1, svuint64_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_u64_m_untied: { xfail *-*-* }
+** eor_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** eor z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u8.c
index 0066376..fdb0fb1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/eor_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (eor_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = sveor_m (p0, z0, x0))
/*
-** eor_w0_u8_m_untied: { xfail *-*-* }
+** eor_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** eor z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (eor_1_u8_m_tied1, svuint8_t,
z0 = sveor_m (p0, z0, 1))
/*
-** eor_1_u8_m_untied: { xfail *-*-* }
+** eor_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** eor z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s16.c
index edaaca5..d5c5fd5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsl_w0_s16_m_tied1, svint16_t, uint16_t,
z0 = svlsl_m (p0, z0, x0))
/*
-** lsl_w0_s16_m_untied: { xfail *-*-* }
+** lsl_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_16_s16_m_tied1, svint16_t,
z0 = svlsl_m (p0, z0, 16))
/*
-** lsl_16_s16_m_untied: { xfail *-*-* }
+** lsl_16_s16_m_untied:
** mov (z[0-9]+\.h), #16
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s32.c
index f98f1f9..b5df8a84 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s32.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_32_s32_m_tied1, svint32_t,
z0 = svlsl_m (p0, z0, 32))
/*
-** lsl_32_s32_m_untied: { xfail *-*-* }
+** lsl_32_s32_m_untied:
** mov (z[0-9]+\.s), #32
** movprfx z0, z1
** lsl z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s64.c
index 3975398..850a798 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s64.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_64_s64_m_tied1, svint64_t,
z0 = svlsl_m (p0, z0, 64))
/*
-** lsl_64_s64_m_untied: { xfail *-*-* }
+** lsl_64_s64_m_untied:
** mov (z[0-9]+\.d), #64
** movprfx z0, z1
** lsl z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s8.c
index 9a9cc95..d877659 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsl_w0_s8_m_tied1, svint8_t, uint8_t,
z0 = svlsl_m (p0, z0, x0))
/*
-** lsl_w0_s8_m_untied: { xfail *-*-* }
+** lsl_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_8_s8_m_tied1, svint8_t,
z0 = svlsl_m (p0, z0, 8))
/*
-** lsl_8_s8_m_untied: { xfail *-*-* }
+** lsl_8_s8_m_untied:
** mov (z[0-9]+\.b), #8
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u16.c
index 57db0fd..068e49b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsl_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svlsl_m (p0, z0, x0))
/*
-** lsl_w0_u16_m_untied: { xfail *-*-* }
+** lsl_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_16_u16_m_tied1, svuint16_t,
z0 = svlsl_m (p0, z0, 16))
/*
-** lsl_16_u16_m_untied: { xfail *-*-* }
+** lsl_16_u16_m_untied:
** mov (z[0-9]+\.h), #16
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u32.c
index 8773f15..9c2be1d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u32.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_32_u32_m_tied1, svuint32_t,
z0 = svlsl_m (p0, z0, 32))
/*
-** lsl_32_u32_m_untied: { xfail *-*-* }
+** lsl_32_u32_m_untied:
** mov (z[0-9]+\.s), #32
** movprfx z0, z1
** lsl z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u64.c
index 7b12bd4..0c1e473 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u64.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_64_u64_m_tied1, svuint64_t,
z0 = svlsl_m (p0, z0, 64))
/*
-** lsl_64_u64_m_untied: { xfail *-*-* }
+** lsl_64_u64_m_untied:
** mov (z[0-9]+\.d), #64
** movprfx z0, z1
** lsl z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u8.c
index 894b551..59d386c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsl_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svlsl_m (p0, z0, x0))
/*
-** lsl_w0_u8_m_untied: { xfail *-*-* }
+** lsl_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_8_u8_m_tied1, svuint8_t,
z0 = svlsl_m (p0, z0, 8))
/*
-** lsl_8_u8_m_untied: { xfail *-*-* }
+** lsl_8_u8_m_untied:
** mov (z[0-9]+\.b), #8
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c
index a020772..7244f64 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_16_s16_m_tied1, svint16_t,
z0 = svlsl_wide_m (p0, z0, 16))
/*
-** lsl_wide_16_s16_m_untied: { xfail *-*-* }
+** lsl_wide_16_s16_m_untied:
** mov (z[0-9]+\.d), #16
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_16_s16_z_tied1, svint16_t,
z0 = svlsl_wide_z (p0, z0, 16))
/*
-** lsl_wide_16_s16_z_untied: { xfail *-*-* }
+** lsl_wide_16_s16_z_untied:
** mov (z[0-9]+\.d), #16
** movprfx z0\.h, p0/z, z1\.h
** lsl z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c
index bd67b70..04333ce 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_32_s32_m_tied1, svint32_t,
z0 = svlsl_wide_m (p0, z0, 32))
/*
-** lsl_wide_32_s32_m_untied: { xfail *-*-* }
+** lsl_wide_32_s32_m_untied:
** mov (z[0-9]+\.d), #32
** movprfx z0, z1
** lsl z0\.s, p0/m, z0\.s, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_32_s32_z_tied1, svint32_t,
z0 = svlsl_wide_z (p0, z0, 32))
/*
-** lsl_wide_32_s32_z_untied: { xfail *-*-* }
+** lsl_wide_32_s32_z_untied:
** mov (z[0-9]+\.d), #32
** movprfx z0\.s, p0/z, z1\.s
** lsl z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c
index 7eb8627..5847db7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_8_s8_m_tied1, svint8_t,
z0 = svlsl_wide_m (p0, z0, 8))
/*
-** lsl_wide_8_s8_m_untied: { xfail *-*-* }
+** lsl_wide_8_s8_m_untied:
** mov (z[0-9]+\.d), #8
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_8_s8_z_tied1, svint8_t,
z0 = svlsl_wide_z (p0, z0, 8))
/*
-** lsl_wide_8_s8_z_untied: { xfail *-*-* }
+** lsl_wide_8_s8_z_untied:
** mov (z[0-9]+\.d), #8
** movprfx z0\.b, p0/z, z1\.b
** lsl z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c
index 482f8d0..2c047b7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_16_u16_m_tied1, svuint16_t,
z0 = svlsl_wide_m (p0, z0, 16))
/*
-** lsl_wide_16_u16_m_untied: { xfail *-*-* }
+** lsl_wide_16_u16_m_untied:
** mov (z[0-9]+\.d), #16
** movprfx z0, z1
** lsl z0\.h, p0/m, z0\.h, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_16_u16_z_tied1, svuint16_t,
z0 = svlsl_wide_z (p0, z0, 16))
/*
-** lsl_wide_16_u16_z_untied: { xfail *-*-* }
+** lsl_wide_16_u16_z_untied:
** mov (z[0-9]+\.d), #16
** movprfx z0\.h, p0/z, z1\.h
** lsl z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c
index 612897d..1e14963 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_32_u32_m_tied1, svuint32_t,
z0 = svlsl_wide_m (p0, z0, 32))
/*
-** lsl_wide_32_u32_m_untied: { xfail *-*-* }
+** lsl_wide_32_u32_m_untied:
** mov (z[0-9]+\.d), #32
** movprfx z0, z1
** lsl z0\.s, p0/m, z0\.s, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_32_u32_z_tied1, svuint32_t,
z0 = svlsl_wide_z (p0, z0, 32))
/*
-** lsl_wide_32_u32_z_untied: { xfail *-*-* }
+** lsl_wide_32_u32_z_untied:
** mov (z[0-9]+\.d), #32
** movprfx z0\.s, p0/z, z1\.s
** lsl z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c
index 6ca2f9e..55f2721 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (lsl_wide_8_u8_m_tied1, svuint8_t,
z0 = svlsl_wide_m (p0, z0, 8))
/*
-** lsl_wide_8_u8_m_untied: { xfail *-*-* }
+** lsl_wide_8_u8_m_untied:
** mov (z[0-9]+\.d), #8
** movprfx z0, z1
** lsl z0\.b, p0/m, z0\.b, \1
@@ -217,7 +217,7 @@ TEST_UNIFORM_Z (lsl_wide_8_u8_z_tied1, svuint8_t,
z0 = svlsl_wide_z (p0, z0, 8))
/*
-** lsl_wide_8_u8_z_untied: { xfail *-*-* }
+** lsl_wide_8_u8_z_untied:
** mov (z[0-9]+\.d), #8
** movprfx z0\.b, p0/z, z1\.b
** lsl z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u16.c
index 6157564..a414119 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsr_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svlsr_m (p0, z0, x0))
/*
-** lsr_w0_u16_m_untied: { xfail *-*-* }
+** lsr_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** lsr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u8.c
index a049ca9..b773eed 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lsr_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (lsr_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svlsr_m (p0, z0, x0))
/*
-** lsr_w0_u8_m_untied: { xfail *-*-* }
+** lsr_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** lsr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f16.c
index 4b31484..60d23b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_2_f16_m_tied1, svfloat16_t,
z0 = svmad_m (p0, z0, z1, 2))
/*
-** mad_2_f16_m_untied: { xfail *-*-* }
+** mad_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmad z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f32.c
index d5dbc85..1c89ac8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_2_f32_m_tied1, svfloat32_t,
z0 = svmad_m (p0, z0, z1, 2))
/*
-** mad_2_f32_m_untied: { xfail *-*-* }
+** mad_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmad z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f64.c
index 7b5dc22..cc5f8dd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_2_f64_m_tied1, svfloat64_t,
z0 = svmad_m (p0, z0, z1, 2))
/*
-** mad_2_f64_m_untied: { xfail *-*-* }
+** mad_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmad z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s16.c
index 02a6d45..4644fa9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mad_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmad_m (p0, z0, z1, x0))
/*
-** mad_w0_s16_m_untied: { xfail *-*-* }
+** mad_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mad z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_s16_m_tied1, svint16_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_s16_m_untied: { xfail *-*-* }
+** mad_11_s16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mad z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s32.c
index d676a0c..36efef5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_s32_m_tied1, svint32_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_s32_m_untied: { xfail *-*-* }
+** mad_11_s32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mad z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s64.c
index 7aa0175..4df7bc41 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_s64_m_tied1, svint64_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_s64_m_untied: { xfail *-*-* }
+** mad_11_s64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mad z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s8.c
index 90d7126..7e3dd67 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_s8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mad_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmad_m (p0, z0, z1, x0))
/*
-** mad_w0_s8_m_untied: { xfail *-*-* }
+** mad_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mad z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_s8_m_tied1, svint8_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_s8_m_untied: { xfail *-*-* }
+** mad_11_s8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mad z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u16.c
index 1d2ad9c..bebb899 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mad_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmad_m (p0, z0, z1, x0))
/*
-** mad_w0_u16_m_untied: { xfail *-*-* }
+** mad_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mad z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_u16_m_tied1, svuint16_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_u16_m_untied: { xfail *-*-* }
+** mad_11_u16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mad z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u32.c
index 4b51958..3f4486d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_u32_m_tied1, svuint32_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_u32_m_untied: { xfail *-*-* }
+** mad_11_u32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mad z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u64.c
index c493909..e4d9a73 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_u64_m_tied1, svuint64_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_u64_m_untied: { xfail *-*-* }
+** mad_11_u64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mad z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u8.c
index 0b4b1b8..01ce998 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mad_u8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mad_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmad_m (p0, z0, z1, x0))
/*
-** mad_w0_u8_m_untied: { xfail *-*-* }
+** mad_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mad z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mad_11_u8_m_tied1, svuint8_t,
z0 = svmad_m (p0, z0, z1, 11))
/*
-** mad_11_u8_m_untied: { xfail *-*-* }
+** mad_11_u8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mad z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s16.c
index 6a21675..637715e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (max_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmax_m (p0, z0, x0))
/*
-** max_w0_s16_m_untied: { xfail *-*-* }
+** max_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** smax z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_s16_m_tied1, svint16_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_s16_m_untied: { xfail *-*-* }
+** max_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** smax z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s32.c
index 07402c7..428709f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_s32_m_tied1, svint32_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_s32_m_untied: { xfail *-*-* }
+** max_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** smax z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s64.c
index 66f00fd..284e097 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_s64_m_tied1, svint64_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_s64_m_untied: { xfail *-*-* }
+** max_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** smax z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s8.c
index c651a26..123f1a9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (max_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmax_m (p0, z0, x0))
/*
-** max_w0_s8_m_untied: { xfail *-*-* }
+** max_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** smax z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_s8_m_tied1, svint8_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_s8_m_untied: { xfail *-*-* }
+** max_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** smax z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u16.c
index 9a0b954..459f89a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (max_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmax_m (p0, z0, x0))
/*
-** max_w0_u16_m_untied: { xfail *-*-* }
+** max_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** umax z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_u16_m_tied1, svuint16_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_u16_m_untied: { xfail *-*-* }
+** max_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** umax z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u32.c
index 91eba25..1ed5c28 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_u32_m_tied1, svuint32_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_u32_m_untied: { xfail *-*-* }
+** max_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** umax z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u64.c
index 5be4c9f..47d7c83 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_u64_m_tied1, svuint64_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_u64_m_untied: { xfail *-*-* }
+** max_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** umax z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u8.c
index 04c9ddb..4301f3e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/max_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (max_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmax_m (p0, z0, x0))
/*
-** max_w0_u8_m_untied: { xfail *-*-* }
+** max_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** umax z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (max_1_u8_m_tied1, svuint8_t,
z0 = svmax_m (p0, z0, 1))
/*
-** max_1_u8_m_untied: { xfail *-*-* }
+** max_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** umax z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s16.c
index 14dfcc4..a6c41cc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (min_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmin_m (p0, z0, x0))
/*
-** min_w0_s16_m_untied: { xfail *-*-* }
+** min_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** smin z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_s16_m_tied1, svint16_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_s16_m_untied: { xfail *-*-* }
+** min_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** smin z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s32.c
index cee2b64..ae9d13e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_s32_m_tied1, svint32_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_s32_m_untied: { xfail *-*-* }
+** min_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** smin z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s64.c
index 0d20bd0..dc21500 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_s64_m_tied1, svint64_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_s64_m_untied: { xfail *-*-* }
+** min_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** smin z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s8.c
index 714b157..0c0107e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (min_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmin_m (p0, z0, x0))
/*
-** min_w0_s8_m_untied: { xfail *-*-* }
+** min_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** smin z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_s8_m_tied1, svint8_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_s8_m_untied: { xfail *-*-* }
+** min_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** smin z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u16.c
index df35cf1..97c2242 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (min_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmin_m (p0, z0, x0))
/*
-** min_w0_u16_m_untied: { xfail *-*-* }
+** min_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** umin z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_u16_m_tied1, svuint16_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_u16_m_untied: { xfail *-*-* }
+** min_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** umin z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u32.c
index 7f84d09..e5abd3c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_u32_m_tied1, svuint32_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_u32_m_untied: { xfail *-*-* }
+** min_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** umin z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u64.c
index 06e6e50..b8b6829 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_u64_m_tied1, svuint64_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_u64_m_untied: { xfail *-*-* }
+** min_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** umin z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u8.c
index 2ca2742..3179dad 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/min_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (min_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmin_m (p0, z0, x0))
/*
-** min_w0_u8_m_untied: { xfail *-*-* }
+** min_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** umin z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (min_1_u8_m_tied1, svuint8_t,
z0 = svmin_m (p0, z0, 1))
/*
-** min_1_u8_m_untied: { xfail *-*-* }
+** min_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** umin z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f16.c
index d32ce58..a1d06c0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_2_f16_m_tied1, svfloat16_t,
z0 = svmla_m (p0, z0, z1, 2))
/*
-** mla_2_f16_m_untied: { xfail *-*-* }
+** mla_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmla z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f32.c
index d10ba69..8741a35 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_2_f32_m_tied1, svfloat32_t,
z0 = svmla_m (p0, z0, z1, 2))
/*
-** mla_2_f32_m_untied: { xfail *-*-* }
+** mla_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmla z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f64.c
index 94c1e0b..505f77a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_2_f64_m_tied1, svfloat64_t,
z0 = svmla_m (p0, z0, z1, 2))
/*
-** mla_2_f64_m_untied: { xfail *-*-* }
+** mla_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmla z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s16.c
index f3ed191..9905f6e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mla_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmla_m (p0, z0, z1, x0))
/*
-** mla_w0_s16_m_untied: { xfail *-*-* }
+** mla_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mla z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_s16_m_tied1, svint16_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_s16_m_untied: { xfail *-*-* }
+** mla_11_s16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mla z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s32.c
index 5e8001a..a9c32cc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_s32_m_tied1, svint32_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_s32_m_untied: { xfail *-*-* }
+** mla_11_s32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mla z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s64.c
index 7b619e5..ed2693b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_s64_m_tied1, svint64_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_s64_m_untied: { xfail *-*-* }
+** mla_11_s64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mla z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s8.c
index 4746894..151cf65 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_s8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mla_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmla_m (p0, z0, z1, x0))
/*
-** mla_w0_s8_m_untied: { xfail *-*-* }
+** mla_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mla z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_s8_m_tied1, svint8_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_s8_m_untied: { xfail *-*-* }
+** mla_11_s8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mla z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u16.c
index 7238e42..36c60ba 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mla_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmla_m (p0, z0, z1, x0))
/*
-** mla_w0_u16_m_untied: { xfail *-*-* }
+** mla_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mla z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_u16_m_tied1, svuint16_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_u16_m_untied: { xfail *-*-* }
+** mla_11_u16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mla z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u32.c
index 7a68bce..69503c4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_u32_m_tied1, svuint32_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_u32_m_untied: { xfail *-*-* }
+** mla_11_u32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mla z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u64.c
index 6233265..5fcbcf6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_u64_m_tied1, svuint64_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_u64_m_untied: { xfail *-*-* }
+** mla_11_u64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mla z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u8.c
index 832ed41..ec92434 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mla_u8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mla_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmla_m (p0, z0, z1, x0))
/*
-** mla_w0_u8_m_untied: { xfail *-*-* }
+** mla_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mla z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mla_11_u8_m_tied1, svuint8_t,
z0 = svmla_m (p0, z0, z1, 11))
/*
-** mla_11_u8_m_untied: { xfail *-*-* }
+** mla_11_u8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mla z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f16.c
index b58104d..1b217dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_2_f16_m_tied1, svfloat16_t,
z0 = svmls_m (p0, z0, z1, 2))
/*
-** mls_2_f16_m_untied: { xfail *-*-* }
+** mls_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmls z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f32.c
index 7d6e605..dddfb2c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_2_f32_m_tied1, svfloat32_t,
z0 = svmls_m (p0, z0, z1, 2))
/*
-** mls_2_f32_m_untied: { xfail *-*-* }
+** mls_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmls z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f64.c
index a6ed28e..1836674 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_2_f64_m_tied1, svfloat64_t,
z0 = svmls_m (p0, z0, z1, 2))
/*
-** mls_2_f64_m_untied: { xfail *-*-* }
+** mls_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmls z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s16.c
index e199829..1cf387c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mls_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmls_m (p0, z0, z1, x0))
/*
-** mls_w0_s16_m_untied: { xfail *-*-* }
+** mls_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mls z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_s16_m_tied1, svint16_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_s16_m_untied: { xfail *-*-* }
+** mls_11_s16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mls z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s32.c
index fe386d0..35c3cc2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_s32_m_tied1, svint32_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_s32_m_untied: { xfail *-*-* }
+** mls_11_s32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mls z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s64.c
index 2998d73..2c51d53 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_s64_m_tied1, svint64_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_s64_m_untied: { xfail *-*-* }
+** mls_11_s64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mls z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s8.c
index c60c431..c1151e9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_s8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mls_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmls_m (p0, z0, z1, x0))
/*
-** mls_w0_s8_m_untied: { xfail *-*-* }
+** mls_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mls z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_s8_m_tied1, svint8_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_s8_m_untied: { xfail *-*-* }
+** mls_11_s8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mls z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u16.c
index e8a9f5c..48aabf8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mls_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmls_m (p0, z0, z1, x0))
/*
-** mls_w0_u16_m_untied: { xfail *-*-* }
+** mls_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mls z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_u16_m_tied1, svuint16_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_u16_m_untied: { xfail *-*-* }
+** mls_11_u16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** mls z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u32.c
index 47e8850..4748372 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_u32_m_tied1, svuint32_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_u32_m_untied: { xfail *-*-* }
+** mls_11_u32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** mls z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u64.c
index 4d441b7..25a43a54 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_u64_m_tied1, svuint64_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_u64_m_untied: { xfail *-*-* }
+** mls_11_u64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** mls z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u8.c
index 0489aaa..5bf03f5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mls_u8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (mls_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmls_m (p0, z0, z1, x0))
/*
-** mls_w0_u8_m_untied: { xfail *-*-* }
+** mls_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mls z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (mls_11_u8_m_tied1, svuint8_t,
z0 = svmls_m (p0, z0, z1, 11))
/*
-** mls_11_u8_m_untied: { xfail *-*-* }
+** mls_11_u8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** mls z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f16.c
index 894961a..b8be344 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_2_f16_m_tied1, svfloat16_t,
z0 = svmsb_m (p0, z0, z1, 2))
/*
-** msb_2_f16_m_untied: { xfail *-*-* }
+** msb_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmsb z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f32.c
index 0d09159..d1bd768 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_2_f32_m_tied1, svfloat32_t,
z0 = svmsb_m (p0, z0, z1, 2))
/*
-** msb_2_f32_m_untied: { xfail *-*-* }
+** msb_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmsb z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f64.c
index 52dc396..9025588 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_2_f64_m_tied1, svfloat64_t,
z0 = svmsb_m (p0, z0, z1, 2))
/*
-** msb_2_f64_m_untied: { xfail *-*-* }
+** msb_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmsb z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s16.c
index 56347cf..e2b8e8b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (msb_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmsb_m (p0, z0, z1, x0))
/*
-** msb_w0_s16_m_untied: { xfail *-*-* }
+** msb_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** msb z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_s16_m_tied1, svint16_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_s16_m_untied: { xfail *-*-* }
+** msb_11_s16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** msb z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s32.c
index fb7a781..afb4d5e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_s32_m_tied1, svint32_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_s32_m_untied: { xfail *-*-* }
+** msb_11_s32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** msb z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s64.c
index 6829fab..c3343af 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_s64_m_tied1, svint64_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_s64_m_untied: { xfail *-*-* }
+** msb_11_s64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** msb z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s8.c
index d7fcafd..255535e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_s8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (msb_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmsb_m (p0, z0, z1, x0))
/*
-** msb_w0_s8_m_untied: { xfail *-*-* }
+** msb_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** msb z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_s8_m_tied1, svint8_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_s8_m_untied: { xfail *-*-* }
+** msb_11_s8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** msb z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u16.c
index 437a960..d7fe8f0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u16.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (msb_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmsb_m (p0, z0, z1, x0))
/*
-** msb_w0_u16_m_untied: { xfail *-*-* }
+** msb_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** msb z0\.h, p0/m, z2\.h, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_u16_m_tied1, svuint16_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_u16_m_untied: { xfail *-*-* }
+** msb_11_u16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** msb z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u32.c
index aaaf034..99b6119 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_u32_m_tied1, svuint32_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_u32_m_untied: { xfail *-*-* }
+** msb_11_u32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** msb z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u64.c
index 5c5d330..a7aa611 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_u64_m_tied1, svuint64_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_u64_m_untied: { xfail *-*-* }
+** msb_11_u64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** msb z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u8.c
index 5665ec9..17ce5e9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/msb_u8.c
@@ -54,7 +54,7 @@ TEST_UNIFORM_ZX (msb_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmsb_m (p0, z0, z1, x0))
/*
-** msb_w0_u8_m_untied: { xfail *-*-* }
+** msb_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** msb z0\.b, p0/m, z2\.b, \1
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (msb_11_u8_m_tied1, svuint8_t,
z0 = svmsb_m (p0, z0, z1, 11))
/*
-** msb_11_u8_m_untied: { xfail *-*-* }
+** msb_11_u8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** msb z0\.b, p0/m, z2\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16.c
index ef3de0c..fd9753b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_1_f16_m_tied1, svfloat16_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f16_m_untied: { xfail *-*-* }
+** mul_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16_notrap.c
index 481fe99..6520aa8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f16_notrap.c
@@ -65,7 +65,7 @@ TEST_UNIFORM_Z (mul_1_f16_m_tied1, svfloat16_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f16_m_untied: { xfail *-*-* }
+** mul_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32.c
index 5b3df6f..3c64337 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_1_f32_m_tied1, svfloat32_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f32_m_untied: { xfail *-*-* }
+** mul_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32_notrap.c
index eb2d240..137fb05 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f32_notrap.c
@@ -65,7 +65,7 @@ TEST_UNIFORM_Z (mul_1_f32_m_tied1, svfloat32_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f32_m_untied: { xfail *-*-* }
+** mul_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64.c
index f5654a9..00a46c2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_1_f64_m_tied1, svfloat64_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f64_m_untied: { xfail *-*-* }
+** mul_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64_notrap.c
index d865618..0a6b92a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_f64_notrap.c
@@ -65,7 +65,7 @@ TEST_UNIFORM_Z (mul_1_f64_m_tied1, svfloat64_t,
z0 = svmul_m (p0, z0, 1))
/*
-** mul_1_f64_m_untied: { xfail *-*-* }
+** mul_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmul z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s16.c
index aa08bc2..80295f7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mul_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmul_m (p0, z0, x0))
/*
-** mul_w0_s16_m_untied: { xfail *-*-* }
+** mul_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mul z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_s16_m_tied1, svint16_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_s16_m_untied: { xfail *-*-* }
+** mul_2_s16_m_untied:
** mov (z[0-9]+\.h), #2
** movprfx z0, z1
** mul z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s32.c
index 7acf77f..01c2249 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_s32_m_tied1, svint32_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_s32_m_untied: { xfail *-*-* }
+** mul_2_s32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** mul z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s64.c
index 549105f..c3cf581 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_s64_m_tied1, svint64_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_s64_m_untied: { xfail *-*-* }
+** mul_2_s64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** mul z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s8.c
index 012e6f2..4ac4c8e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mul_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmul_m (p0, z0, x0))
/*
-** mul_w0_s8_m_untied: { xfail *-*-* }
+** mul_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mul z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_s8_m_tied1, svint8_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_s8_m_untied: { xfail *-*-* }
+** mul_2_s8_m_untied:
** mov (z[0-9]+\.b), #2
** movprfx z0, z1
** mul z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u16.c
index 300987e..affee96 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mul_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmul_m (p0, z0, x0))
/*
-** mul_w0_u16_m_untied: { xfail *-*-* }
+** mul_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** mul z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_u16_m_tied1, svuint16_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_u16_m_untied: { xfail *-*-* }
+** mul_2_u16_m_untied:
** mov (z[0-9]+\.h), #2
** movprfx z0, z1
** mul z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u32.c
index 288d17b..38b4bc7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_u32_m_tied1, svuint32_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_u32_m_untied: { xfail *-*-* }
+** mul_2_u32_m_untied:
** mov (z[0-9]+\.s), #2
** movprfx z0, z1
** mul z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u64.c
index f6959db..ab65555 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_u64_m_tied1, svuint64_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_u64_m_untied: { xfail *-*-* }
+** mul_2_u64_m_untied:
** mov (z[0-9]+\.d), #2
** movprfx z0, z1
** mul z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u8.c
index b2745a4..ef0a522 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mul_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mul_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmul_m (p0, z0, x0))
/*
-** mul_w0_u8_m_untied: { xfail *-*-* }
+** mul_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** mul z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mul_2_u8_m_tied1, svuint8_t,
z0 = svmul_m (p0, z0, 2))
/*
-** mul_2_u8_m_untied: { xfail *-*-* }
+** mul_2_u8_m_untied:
** mov (z[0-9]+\.b), #2
** movprfx z0, z1
** mul z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s16.c
index a81532f..576aedc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mulh_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svmulh_m (p0, z0, x0))
/*
-** mulh_w0_s16_m_untied: { xfail *-*-* }
+** mulh_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** smulh z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_s16_m_tied1, svint16_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_s16_m_untied: { xfail *-*-* }
+** mulh_11_s16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** smulh z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s32.c
index 078feeb..331a46f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_s32_m_tied1, svint32_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_s32_m_untied: { xfail *-*-* }
+** mulh_11_s32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** smulh z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s64.c
index a87d4d5..c284bcf 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_s64_m_tied1, svint64_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_s64_m_untied: { xfail *-*-* }
+** mulh_11_s64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** smulh z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s8.c
index f9cd01a..4327109 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mulh_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svmulh_m (p0, z0, x0))
/*
-** mulh_w0_s8_m_untied: { xfail *-*-* }
+** mulh_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** smulh z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_s8_m_tied1, svint8_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_s8_m_untied: { xfail *-*-* }
+** mulh_11_s8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** smulh z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u16.c
index e9173eb..7f23998 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mulh_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svmulh_m (p0, z0, x0))
/*
-** mulh_w0_u16_m_untied: { xfail *-*-* }
+** mulh_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** umulh z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_u16_m_tied1, svuint16_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_u16_m_untied: { xfail *-*-* }
+** mulh_11_u16_m_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** umulh z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u32.c
index de1f24f..2c187d6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_u32_m_tied1, svuint32_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_u32_m_untied: { xfail *-*-* }
+** mulh_11_u32_m_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** umulh z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u64.c
index 0d7e12a..1176a31 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_u64_m_tied1, svuint64_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_u64_m_untied: { xfail *-*-* }
+** mulh_11_u64_m_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** umulh z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u8.c
index db7b1be..5bd1009 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulh_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (mulh_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svmulh_m (p0, z0, x0))
/*
-** mulh_w0_u8_m_untied: { xfail *-*-* }
+** mulh_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** umulh z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulh_11_u8_m_tied1, svuint8_t,
z0 = svmulh_m (p0, z0, 11))
/*
-** mulh_11_u8_m_untied: { xfail *-*-* }
+** mulh_11_u8_m_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** umulh z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f16.c
index b8d6bf5..174c10e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f16.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulx_1_f16_m_tied1, svfloat16_t,
z0 = svmulx_m (p0, z0, 1))
/*
-** mulx_1_f16_m_untied: { xfail *-*-* }
+** mulx_1_f16_m_untied:
** fmov (z[0-9]+\.h), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.h, p0/m, z0\.h, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (mulx_0p5_f16_m_tied1, svfloat16_t,
z0 = svmulx_m (p0, z0, 0.5))
/*
-** mulx_0p5_f16_m_untied: { xfail *-*-* }
+** mulx_0p5_f16_m_untied:
** fmov (z[0-9]+\.h), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fmulx z0\.h, p0/m, z0\.h, \1
@@ -106,7 +106,7 @@ TEST_UNIFORM_Z (mulx_2_f16_m_tied1, svfloat16_t,
z0 = svmulx_m (p0, z0, 2))
/*
-** mulx_2_f16_m_untied: { xfail *-*-* }
+** mulx_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f32.c
index b8f5c13..8baf4e8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulx_1_f32_m_tied1, svfloat32_t,
z0 = svmulx_m (p0, z0, 1))
/*
-** mulx_1_f32_m_untied: { xfail *-*-* }
+** mulx_1_f32_m_untied:
** fmov (z[0-9]+\.s), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.s, p0/m, z0\.s, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (mulx_0p5_f32_m_tied1, svfloat32_t,
z0 = svmulx_m (p0, z0, 0.5))
/*
-** mulx_0p5_f32_m_untied: { xfail *-*-* }
+** mulx_0p5_f32_m_untied:
** fmov (z[0-9]+\.s), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fmulx z0\.s, p0/m, z0\.s, \1
@@ -106,7 +106,7 @@ TEST_UNIFORM_Z (mulx_2_f32_m_tied1, svfloat32_t,
z0 = svmulx_m (p0, z0, 2))
/*
-** mulx_2_f32_m_untied: { xfail *-*-* }
+** mulx_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f64.c
index 746cc94..1ab13ca 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mulx_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (mulx_1_f64_m_tied1, svfloat64_t,
z0 = svmulx_m (p0, z0, 1))
/*
-** mulx_1_f64_m_untied: { xfail *-*-* }
+** mulx_1_f64_m_untied:
** fmov (z[0-9]+\.d), #1\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.d, p0/m, z0\.d, \1
@@ -85,7 +85,7 @@ TEST_UNIFORM_Z (mulx_0p5_f64_m_tied1, svfloat64_t,
z0 = svmulx_m (p0, z0, 0.5))
/*
-** mulx_0p5_f64_m_untied: { xfail *-*-* }
+** mulx_0p5_f64_m_untied:
** fmov (z[0-9]+\.d), #(?:0\.5|5\.0e-1)
** movprfx z0, z1
** fmulx z0\.d, p0/m, z0\.d, \1
@@ -106,7 +106,7 @@ TEST_UNIFORM_Z (mulx_2_f64_m_tied1, svfloat64_t,
z0 = svmulx_m (p0, z0, 2))
/*
-** mulx_2_f64_m_untied: { xfail *-*-* }
+** mulx_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fmulx z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f16.c
index 92e0664..b280f26 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmad_2_f16_m_tied1, svfloat16_t,
z0 = svnmad_m (p0, z0, z1, 2))
/*
-** nmad_2_f16_m_untied: { xfail *-*-* }
+** nmad_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmad z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f32.c
index cef731e..f8c91b5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmad_2_f32_m_tied1, svfloat32_t,
z0 = svnmad_m (p0, z0, z1, 2))
/*
-** nmad_2_f32_m_untied: { xfail *-*-* }
+** nmad_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmad z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f64.c
index 43b97c0..4ff6471 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmad_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmad_2_f64_m_tied1, svfloat64_t,
z0 = svnmad_m (p0, z0, z1, 2))
/*
-** nmad_2_f64_m_untied: { xfail *-*-* }
+** nmad_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmad z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f16.c
index 75d0ec7..cd5bb6f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmla_2_f16_m_tied1, svfloat16_t,
z0 = svnmla_m (p0, z0, z1, 2))
/*
-** nmla_2_f16_m_untied: { xfail *-*-* }
+** nmla_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmla z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f32.c
index da594d3..f8d44fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmla_2_f32_m_tied1, svfloat32_t,
z0 = svnmla_m (p0, z0, z1, 2))
/*
-** nmla_2_f32_m_untied: { xfail *-*-* }
+** nmla_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmla z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f64.c
index 73f15f4..4e599be 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmla_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmla_2_f64_m_tied1, svfloat64_t,
z0 = svnmla_m (p0, z0, z1, 2))
/*
-** nmla_2_f64_m_untied: { xfail *-*-* }
+** nmla_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmla z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f16.c
index ccf7e51..dc8b1fe 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmls_2_f16_m_tied1, svfloat16_t,
z0 = svnmls_m (p0, z0, z1, 2))
/*
-** nmls_2_f16_m_untied: { xfail *-*-* }
+** nmls_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmls z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f32.c
index 10d3450..84e74e1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmls_2_f32_m_tied1, svfloat32_t,
z0 = svnmls_m (p0, z0, z1, 2))
/*
-** nmls_2_f32_m_untied: { xfail *-*-* }
+** nmls_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmls z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f64.c
index bf2a441..27d4682 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmls_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmls_2_f64_m_tied1, svfloat64_t,
z0 = svnmls_m (p0, z0, z1, 2))
/*
-** nmls_2_f64_m_untied: { xfail *-*-* }
+** nmls_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmls z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f16.c
index 5311ceb..c485fb6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f16.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmsb_2_f16_m_tied1, svfloat16_t,
z0 = svnmsb_m (p0, z0, z1, 2))
/*
-** nmsb_2_f16_m_untied: { xfail *-*-* }
+** nmsb_2_f16_m_untied:
** fmov (z[0-9]+\.h), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmsb z0\.h, p0/m, z2\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f32.c
index 6f1407a..1c1294d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f32.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmsb_2_f32_m_tied1, svfloat32_t,
z0 = svnmsb_m (p0, z0, z1, 2))
/*
-** nmsb_2_f32_m_untied: { xfail *-*-* }
+** nmsb_2_f32_m_untied:
** fmov (z[0-9]+\.s), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmsb z0\.s, p0/m, z2\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f64.c
index 5e4e1dd..50c55a0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/nmsb_f64.c
@@ -75,7 +75,7 @@ TEST_UNIFORM_Z (nmsb_2_f64_m_tied1, svfloat64_t,
z0 = svnmsb_m (p0, z0, z1, 2))
/*
-** nmsb_2_f64_m_untied: { xfail *-*-* }
+** nmsb_2_f64_m_untied:
** fmov (z[0-9]+\.d), #2\.0(?:e\+0)?
** movprfx z0, z1
** fnmsb z0\.d, p0/m, z2\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s16.c
index 62b707a..f91af0a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (orr_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svorr_m (p0, z0, x0))
/*
-** orr_w0_s16_m_untied: { xfail *-*-* }
+** orr_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** orr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_s16_m_tied1, svint16_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_s16_m_untied: { xfail *-*-* }
+** orr_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** orr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s32.c
index 2e0e1e8..514e65a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_s32_m_tied1, svint32_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_s32_m_untied: { xfail *-*-* }
+** orr_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** orr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s64.c
index 1538fdd..4f6cad7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_s64_m_tied1, svint64_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_s64_m_untied: { xfail *-*-* }
+** orr_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** orr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s8.c
index b6483b6..d8a175b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (orr_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svorr_m (p0, z0, x0))
/*
-** orr_w0_s8_m_untied: { xfail *-*-* }
+** orr_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** orr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_s8_m_tied1, svint8_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_s8_m_untied: { xfail *-*-* }
+** orr_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** orr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u16.c
index 000a044..4f2e28d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (orr_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svorr_m (p0, z0, x0))
/*
-** orr_w0_u16_m_untied: { xfail *-*-* }
+** orr_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** orr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_u16_m_tied1, svuint16_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_u16_m_untied: { xfail *-*-* }
+** orr_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** orr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u32.c
index 8e2351d..0f155c6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_u32_m_tied1, svuint32_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_u32_m_untied: { xfail *-*-* }
+** orr_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** orr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u64.c
index 323e210..eec5e98 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_u64_m_tied1, svuint64_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_u64_m_untied: { xfail *-*-* }
+** orr_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** orr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u8.c
index efe5591..17be109 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/orr_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (orr_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svorr_m (p0, z0, x0))
/*
-** orr_w0_u8_m_untied: { xfail *-*-* }
+** orr_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** orr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (orr_1_u8_m_tied1, svuint8_t,
z0 = svorr_m (p0, z0, 1))
/*
-** orr_1_u8_m_untied: { xfail *-*-* }
+** orr_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** orr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f16.c
index 9c55425..cb4225c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (scale_w0_f16_m_tied1, svfloat16_t, int16_t,
z0 = svscale_m (p0, z0, x0))
/*
-** scale_w0_f16_m_untied: { xfail *-*-* }
+** scale_w0_f16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** fscale z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (scale_3_f16_m_tied1, svfloat16_t,
z0 = svscale_m (p0, z0, 3))
/*
-** scale_3_f16_m_untied: { xfail *-*-* }
+** scale_3_f16_m_untied:
** mov (z[0-9]+\.h), #3
** movprfx z0, z1
** fscale z0\.h, p0/m, z0\.h, \1
@@ -127,7 +127,7 @@ TEST_UNIFORM_ZX (scale_w0_f16_z_tied1, svfloat16_t, int16_t,
z0 = svscale_z (p0, z0, x0))
/*
-** scale_w0_f16_z_untied: { xfail *-*-* }
+** scale_w0_f16_z_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0\.h, p0/z, z1\.h
** fscale z0\.h, p0/m, z0\.h, \1
@@ -149,7 +149,7 @@ TEST_UNIFORM_Z (scale_3_f16_z_tied1, svfloat16_t,
z0 = svscale_z (p0, z0, 3))
/*
-** scale_3_f16_z_untied: { xfail *-*-* }
+** scale_3_f16_z_untied:
** mov (z[0-9]+\.h), #3
** movprfx z0\.h, p0/z, z1\.h
** fscale z0\.h, p0/m, z0\.h, \1
@@ -211,7 +211,7 @@ TEST_UNIFORM_ZX (scale_w0_f16_x_tied1, svfloat16_t, int16_t,
z0 = svscale_x (p0, z0, x0))
/*
-** scale_w0_f16_x_untied: { xfail *-*-* }
+** scale_w0_f16_x_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** fscale z0\.h, p0/m, z0\.h, \1
@@ -232,7 +232,7 @@ TEST_UNIFORM_Z (scale_3_f16_x_tied1, svfloat16_t,
z0 = svscale_x (p0, z0, 3))
/*
-** scale_3_f16_x_untied: { xfail *-*-* }
+** scale_3_f16_x_untied:
** mov (z[0-9]+\.h), #3
** movprfx z0, z1
** fscale z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f32.c
index 12a1b1d..5079ee3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (scale_3_f32_m_tied1, svfloat32_t,
z0 = svscale_m (p0, z0, 3))
/*
-** scale_3_f32_m_untied: { xfail *-*-* }
+** scale_3_f32_m_untied:
** mov (z[0-9]+\.s), #3
** movprfx z0, z1
** fscale z0\.s, p0/m, z0\.s, \1
@@ -149,7 +149,7 @@ TEST_UNIFORM_Z (scale_3_f32_z_tied1, svfloat32_t,
z0 = svscale_z (p0, z0, 3))
/*
-** scale_3_f32_z_untied: { xfail *-*-* }
+** scale_3_f32_z_untied:
** mov (z[0-9]+\.s), #3
** movprfx z0\.s, p0/z, z1\.s
** fscale z0\.s, p0/m, z0\.s, \1
@@ -232,7 +232,7 @@ TEST_UNIFORM_Z (scale_3_f32_x_tied1, svfloat32_t,
z0 = svscale_x (p0, z0, 3))
/*
-** scale_3_f32_x_untied: { xfail *-*-* }
+** scale_3_f32_x_untied:
** mov (z[0-9]+\.s), #3
** movprfx z0, z1
** fscale z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f64.c
index f6b1171..4d6235b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/scale_f64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (scale_3_f64_m_tied1, svfloat64_t,
z0 = svscale_m (p0, z0, 3))
/*
-** scale_3_f64_m_untied: { xfail *-*-* }
+** scale_3_f64_m_untied:
** mov (z[0-9]+\.d), #3
** movprfx z0, z1
** fscale z0\.d, p0/m, z0\.d, \1
@@ -149,7 +149,7 @@ TEST_UNIFORM_Z (scale_3_f64_z_tied1, svfloat64_t,
z0 = svscale_z (p0, z0, 3))
/*
-** scale_3_f64_z_untied: { xfail *-*-* }
+** scale_3_f64_z_untied:
** mov (z[0-9]+\.d), #3
** movprfx z0\.d, p0/z, z1\.d
** fscale z0\.d, p0/m, z0\.d, \1
@@ -232,7 +232,7 @@ TEST_UNIFORM_Z (scale_3_f64_x_tied1, svfloat64_t,
z0 = svscale_x (p0, z0, 3))
/*
-** scale_3_f64_x_untied: { xfail *-*-* }
+** scale_3_f64_x_untied:
** mov (z[0-9]+\.d), #3
** movprfx z0, z1
** fscale z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s16.c
index aea8ea2..5b156a7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (sub_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svsub_m (p0, z0, x0))
/*
-** sub_w0_s16_m_untied: { xfail *-*-* }
+** sub_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sub z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_s16_m_tied1, svint16_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_s16_m_untied: { xfail *-*-* }
+** sub_1_s16_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1\.h
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s32.c
index db6f3df..344be4f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_s32_m_tied1, svint32_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_s32_m_untied: { xfail *-*-* }
+** sub_1_s32_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.s, p0/m, z0\.s, \1\.s
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s64.c
index b9184c3..b6eb7f2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_s64_m_tied1, svint64_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_s64_m_untied: { xfail *-*-* }
+** sub_1_s64_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.d, p0/m, z0\.d, \1\.d
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s8.c
index 0d7ba99..3edd4b0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (sub_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svsub_m (p0, z0, x0))
/*
-** sub_w0_s8_m_untied: { xfail *-*-* }
+** sub_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sub z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_s8_m_tied1, svint8_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_s8_m_untied: { xfail *-*-* }
+** sub_1_s8_m_untied:
** mov (z[0-9]+\.b), #-1
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u16.c
index 89620e1..77cf408 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (sub_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svsub_m (p0, z0, x0))
/*
-** sub_w0_u16_m_untied: { xfail *-*-* }
+** sub_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sub z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_u16_m_tied1, svuint16_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_u16_m_untied: { xfail *-*-* }
+** sub_1_u16_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.h, p0/m, z0\.h, \1\.h
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u32.c
index c4b405d..0befdd7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_u32_m_tied1, svuint32_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_u32_m_untied: { xfail *-*-* }
+** sub_1_u32_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.s, p0/m, z0\.s, \1\.s
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u64.c
index fb7f717..3602c11 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_u64_m_tied1, svuint64_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_u64_m_untied: { xfail *-*-* }
+** sub_1_u64_m_untied:
** mov (z[0-9]+)\.b, #-1
** movprfx z0, z1
** add z0\.d, p0/m, z0\.d, \1\.d
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u8.c
index 4552041..036fca2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sub_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (sub_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svsub_m (p0, z0, x0))
/*
-** sub_w0_u8_m_untied: { xfail *-*-* }
+** sub_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sub z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (sub_1_u8_m_tied1, svuint8_t,
z0 = svsub_m (p0, z0, 1))
/*
-** sub_1_u8_m_untied: { xfail *-*-* }
+** sub_1_u8_m_untied:
** mov (z[0-9]+\.b), #-1
** movprfx z0, z1
** add z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16.c
index 6929b28..b4d6f7b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (subr_m1_f16_m_tied1, svfloat16_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f16_m_untied: { xfail *-*-* }
+** subr_m1_f16_m_untied:
** fmov (z[0-9]+\.h), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16_notrap.c
index a31ebd2..78985a1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f16_notrap.c
@@ -103,7 +103,7 @@ TEST_UNIFORM_Z (subr_m1_f16_m_tied1, svfloat16_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f16_m_untied: { xfail *-*-* }
+** subr_m1_f16_m_untied:
** fmov (z[0-9]+\.h), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32.c
index 5bf90a3..a0a4b98 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (subr_m1_f32_m_tied1, svfloat32_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f32_m_untied: { xfail *-*-* }
+** subr_m1_f32_m_untied:
** fmov (z[0-9]+\.s), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32_notrap.c
index 75ae0dc..04aec03 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f32_notrap.c
@@ -103,7 +103,7 @@ TEST_UNIFORM_Z (subr_m1_f32_m_tied1, svfloat32_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f32_m_untied: { xfail *-*-* }
+** subr_m1_f32_m_untied:
** fmov (z[0-9]+\.s), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64.c
index 7091c40..64806b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64.c
@@ -102,7 +102,7 @@ TEST_UNIFORM_Z (subr_m1_f64_m_tied1, svfloat64_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f64_m_untied: { xfail *-*-* }
+** subr_m1_f64_m_untied:
** fmov (z[0-9]+\.d), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64_notrap.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64_notrap.c
index 98598dd..7458e5c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64_notrap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_f64_notrap.c
@@ -103,7 +103,7 @@ TEST_UNIFORM_Z (subr_m1_f64_m_tied1, svfloat64_t,
z0 = svsubr_m (p0, z0, -1))
/*
-** subr_m1_f64_m_untied: { xfail *-*-* }
+** subr_m1_f64_m_untied:
** fmov (z[0-9]+\.d), #-1\.0(?:e\+0)?
** movprfx z0, z1
** fsubr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s16.c
index d3dad62..a63a9bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (subr_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svsubr_m (p0, z0, x0))
/*
-** subr_w0_s16_m_untied: { xfail *-*-* }
+** subr_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** subr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_s16_m_tied1, svint16_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_s16_m_untied: { xfail *-*-* }
+** subr_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** subr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s32.c
index ce62e2f..e709abe 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_s32_m_tied1, svint32_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_s32_m_untied: { xfail *-*-* }
+** subr_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** subr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s64.c
index ada9e97..bafcd8e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_s64_m_tied1, svint64_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_s64_m_untied: { xfail *-*-* }
+** subr_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** subr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c
index 90d2a6d..b9615de 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (subr_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svsubr_m (p0, z0, x0))
/*
-** subr_w0_s8_m_untied: { xfail *-*-* }
+** subr_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** subr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_s8_m_tied1, svint8_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_s8_m_untied: { xfail *-*-* }
+** subr_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** subr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u16.c
index 379a80f..0c344c4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (subr_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svsubr_m (p0, z0, x0))
/*
-** subr_w0_u16_m_untied: { xfail *-*-* }
+** subr_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** subr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_u16_m_tied1, svuint16_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_u16_m_untied: { xfail *-*-* }
+** subr_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** subr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u32.c
index 215f8b4..9d3a69c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_u32_m_tied1, svuint32_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_u32_m_untied: { xfail *-*-* }
+** subr_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** subr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u64.c
index 78d9451..4d48e94 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_u64_m_tied1, svuint64_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_u64_m_untied: { xfail *-*-* }
+** subr_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** subr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u8.c
index fe5f96d..65606b6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (subr_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svsubr_m (p0, z0, x0))
/*
-** subr_w0_u8_m_untied: { xfail *-*-* }
+** subr_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** subr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (subr_1_u8_m_tied1, svuint8_t,
z0 = svsubr_m (p0, z0, 1))
/*
-** subr_1_u8_m_untied: { xfail *-*-* }
+** subr_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** subr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s16.c
index acad87d..5716b89 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s16.c
@@ -66,7 +66,7 @@ TEST_UNIFORM_ZX (bcax_w0_s16_tied2, svint16_t, int16_t,
z0 = svbcax (z1, z0, x0))
/*
-** bcax_w0_s16_untied: { xfail *-*-*}
+** bcax_w0_s16_untied:
** mov (z[0-9]+)\.h, w0
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_s16_tied2, svint16_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_s16_untied: { xfail *-*-*}
+** bcax_11_s16_untied:
** mov (z[0-9]+)\.h, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s32.c
index aeb4357..1612340 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s32.c
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_s32_tied2, svint32_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_s32_untied: { xfail *-*-*}
+** bcax_11_s32_untied:
** mov (z[0-9]+)\.s, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s64.c
index 2087e58..54ca151 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s64.c
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_s64_tied2, svint64_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_s64_untied: { xfail *-*-*}
+** bcax_11_s64_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1|\1, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s8.c
index 548aafa..3e2a0ee 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_s8.c
@@ -66,7 +66,7 @@ TEST_UNIFORM_ZX (bcax_w0_s8_tied2, svint8_t, int8_t,
z0 = svbcax (z1, z0, x0))
/*
-** bcax_w0_s8_untied: { xfail *-*-*}
+** bcax_w0_s8_untied:
** mov (z[0-9]+)\.b, w0
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_s8_tied2, svint8_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_s8_untied: { xfail *-*-*}
+** bcax_11_s8_untied:
** mov (z[0-9]+)\.b, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u16.c
index b63a477..72c40ac 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u16.c
@@ -66,7 +66,7 @@ TEST_UNIFORM_ZX (bcax_w0_u16_tied2, svuint16_t, uint16_t,
z0 = svbcax (z1, z0, x0))
/*
-** bcax_w0_u16_untied: { xfail *-*-*}
+** bcax_w0_u16_untied:
** mov (z[0-9]+)\.h, w0
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_u16_tied2, svuint16_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_u16_untied: { xfail *-*-*}
+** bcax_11_u16_untied:
** mov (z[0-9]+)\.h, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u32.c
index d03c938..ca75164 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u32.c
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_u32_tied2, svuint32_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_u32_untied: { xfail *-*-*}
+** bcax_11_u32_untied:
** mov (z[0-9]+)\.s, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u64.c
index e039062..8145a0c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u64.c
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_u64_tied2, svuint64_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_u64_untied: { xfail *-*-*}
+** bcax_11_u64_untied:
** mov (z[0-9]+\.d), #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1|\1, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u8.c
index 0957d58..655d271 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bcax_u8.c
@@ -66,7 +66,7 @@ TEST_UNIFORM_ZX (bcax_w0_u8_tied2, svuint8_t, uint8_t,
z0 = svbcax (z1, z0, x0))
/*
-** bcax_w0_u8_untied: { xfail *-*-*}
+** bcax_w0_u8_untied:
** mov (z[0-9]+)\.b, w0
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
@@ -99,7 +99,7 @@ TEST_UNIFORM_Z (bcax_11_u8_tied2, svuint8_t,
z0 = svbcax (z1, z0, 11))
/*
-** bcax_11_u8_untied: { xfail *-*-*}
+** bcax_11_u8_untied:
** mov (z[0-9]+)\.b, #11
** movprfx z0, z1
** bcax z0\.d, z0\.d, (z2\.d, \1\.d|\1\.d, z2\.d)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s16.c
index 6330c42..5c53cac 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s16.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qadd_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svqadd_m (p0, z0, x0))
/*
-** qadd_w0_s16_m_untied: { xfail *-*-* }
+** qadd_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sqadd z0\.h, p0/m, z0\.h, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qadd_1_s16_m_tied1, svint16_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_s16_m_untied: { xfail *-*-* }
+** qadd_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** sqadd z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s32.c
index bab4874..bb355c5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s32.c
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qadd_1_s32_m_tied1, svint32_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_s32_m_untied: { xfail *-*-* }
+** qadd_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** sqadd z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s64.c
index c2ad921..8c35098 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s64.c
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qadd_1_s64_m_tied1, svint64_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_s64_m_untied: { xfail *-*-* }
+** qadd_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** sqadd z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s8.c
index 61343be..2a514e3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_s8.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qadd_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svqadd_m (p0, z0, x0))
/*
-** qadd_w0_s8_m_untied: { xfail *-*-* }
+** qadd_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sqadd z0\.b, p0/m, z0\.b, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qadd_1_s8_m_tied1, svint8_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_s8_m_untied: { xfail *-*-* }
+** qadd_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** sqadd z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u16.c
index f6c7ca9..870a910 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u16.c
@@ -166,7 +166,7 @@ TEST_UNIFORM_ZX (qadd_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svqadd_m (p0, z0, x0))
/*
-** qadd_w0_u16_m_untied: { xfail *-*-* }
+** qadd_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** uqadd z0\.h, p0/m, z0\.h, \1
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qadd_1_u16_m_tied1, svuint16_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_u16_m_untied: { xfail *-*-* }
+** qadd_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** uqadd z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u32.c
index 7701d13..94c05fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u32.c
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qadd_1_u32_m_tied1, svuint32_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_u32_m_untied: { xfail *-*-* }
+** qadd_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** uqadd z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u64.c
index df8c3f8..cf5b2d2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u64.c
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qadd_1_u64_m_tied1, svuint64_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_u64_m_untied: { xfail *-*-* }
+** qadd_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** uqadd z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u8.c
index 6c856e2..77cb1b7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qadd_u8.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qadd_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svqadd_m (p0, z0, x0))
/*
-** qadd_w0_u8_m_untied: { xfail *-*-* }
+** qadd_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** uqadd z0\.b, p0/m, z0\.b, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qadd_1_u8_m_tied1, svuint8_t,
z0 = svqadd_m (p0, z0, 1))
/*
-** qadd_1_u8_m_untied: { xfail *-*-* }
+** qadd_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** uqadd z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s16.c
index 4d1e903..a37743b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s16.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (qdmlalb_w0_s16_tied1, svint16_t, svint8_t, int8_t,
z0 = svqdmlalb (z0, z4, x0))
/*
-** qdmlalb_w0_s16_untied: { xfail *-*-* }
+** qdmlalb_w0_s16_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sqdmlalb z0\.h, z4\.b, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalb_11_s16_tied1, svint16_t, svint8_t,
z0 = svqdmlalb (z0, z4, 11))
/*
-** qdmlalb_11_s16_untied: { xfail *-*-* }
+** qdmlalb_11_s16_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** sqdmlalb z0\.h, z4\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s32.c
index 9437377..1c319eaa 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s32.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (qdmlalb_w0_s32_tied1, svint32_t, svint16_t, int16_t,
z0 = svqdmlalb (z0, z4, x0))
/*
-** qdmlalb_w0_s32_untied: { xfail *-*-* }
+** qdmlalb_w0_s32_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sqdmlalb z0\.s, z4\.h, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalb_11_s32_tied1, svint32_t, svint16_t,
z0 = svqdmlalb (z0, z4, 11))
/*
-** qdmlalb_11_s32_untied: { xfail *-*-* }
+** qdmlalb_11_s32_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** sqdmlalb z0\.s, z4\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s64.c
index 8ac848b..3f2ab88 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalb_s64.c
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalb_11_s64_tied1, svint64_t, svint32_t,
z0 = svqdmlalb (z0, z4, 11))
/*
-** qdmlalb_11_s64_untied: { xfail *-*-* }
+** qdmlalb_11_s64_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** sqdmlalb z0\.d, z4\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s16.c
index d591db3..e21d31f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s16.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (qdmlalbt_w0_s16_tied1, svint16_t, svint8_t, int8_t,
z0 = svqdmlalbt (z0, z4, x0))
/*
-** qdmlalbt_w0_s16_untied: { xfail *-*-*}
+** qdmlalbt_w0_s16_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sqdmlalbt z0\.h, z4\.b, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalbt_11_s16_tied1, svint16_t, svint8_t,
z0 = svqdmlalbt (z0, z4, 11))
/*
-** qdmlalbt_11_s16_untied: { xfail *-*-*}
+** qdmlalbt_11_s16_untied:
** mov (z[0-9]+\.b), #11
** movprfx z0, z1
** sqdmlalbt z0\.h, z4\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s32.c
index e8326fe..32978e0 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s32.c
@@ -54,7 +54,7 @@ TEST_DUAL_ZX (qdmlalbt_w0_s32_tied1, svint32_t, svint16_t, int16_t,
z0 = svqdmlalbt (z0, z4, x0))
/*
-** qdmlalbt_w0_s32_untied: { xfail *-*-*}
+** qdmlalbt_w0_s32_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sqdmlalbt z0\.s, z4\.h, \1
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalbt_11_s32_tied1, svint32_t, svint16_t,
z0 = svqdmlalbt (z0, z4, 11))
/*
-** qdmlalbt_11_s32_untied: { xfail *-*-*}
+** qdmlalbt_11_s32_untied:
** mov (z[0-9]+\.h), #11
** movprfx z0, z1
** sqdmlalbt z0\.s, z4\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s64.c
index f29e4de..22886bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qdmlalbt_s64.c
@@ -75,7 +75,7 @@ TEST_DUAL_Z (qdmlalbt_11_s64_tied1, svint64_t, svint32_t,
z0 = svqdmlalbt (z0, z4, 11))
/*
-** qdmlalbt_11_s64_untied: { xfail *-*-*}
+** qdmlalbt_11_s64_untied:
** mov (z[0-9]+\.s), #11
** movprfx z0, z1
** sqdmlalbt z0\.d, z4\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s16.c
index c102e58..624f8bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s16.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qsub_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svqsub_m (p0, z0, x0))
/*
-** qsub_w0_s16_m_untied: { xfail *-*-* }
+** qsub_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sqsub z0\.h, p0/m, z0\.h, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qsub_1_s16_m_tied1, svint16_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_s16_m_untied: { xfail *-*-* }
+** qsub_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** sqsub z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s32.c
index e703ce9..b435f69 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s32.c
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qsub_1_s32_m_tied1, svint32_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_s32_m_untied: { xfail *-*-* }
+** qsub_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** sqsub z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s64.c
index e901013..07eac9d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s64.c
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qsub_1_s64_m_tied1, svint64_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_s64_m_untied: { xfail *-*-* }
+** qsub_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** sqsub z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s8.c
index 067ee6e..71eec64 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_s8.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qsub_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svqsub_m (p0, z0, x0))
/*
-** qsub_w0_s8_m_untied: { xfail *-*-* }
+** qsub_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sqsub z0\.b, p0/m, z0\.b, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qsub_1_s8_m_tied1, svint8_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_s8_m_untied: { xfail *-*-* }
+** qsub_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** sqsub z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u16.c
index 61be746..a544d8c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u16.c
@@ -166,7 +166,7 @@ TEST_UNIFORM_ZX (qsub_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svqsub_m (p0, z0, x0))
/*
-** qsub_w0_u16_m_untied: { xfail *-*-* }
+** qsub_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** uqsub z0\.h, p0/m, z0\.h, \1
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qsub_1_u16_m_tied1, svuint16_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_u16_m_untied: { xfail *-*-* }
+** qsub_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** uqsub z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u32.c
index d90dcadb..20c95d2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u32.c
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qsub_1_u32_m_tied1, svuint32_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_u32_m_untied: { xfail *-*-* }
+** qsub_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** uqsub z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u64.c
index b25c6a5..a5a0d24 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u64.c
@@ -187,7 +187,7 @@ TEST_UNIFORM_Z (qsub_1_u64_m_tied1, svuint64_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_u64_m_untied: { xfail *-*-* }
+** qsub_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** uqsub z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u8.c
index 686b2b4..cdcf039 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsub_u8.c
@@ -163,7 +163,7 @@ TEST_UNIFORM_ZX (qsub_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svqsub_m (p0, z0, x0))
/*
-** qsub_w0_u8_m_untied: { xfail *-*-* }
+** qsub_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** uqsub z0\.b, p0/m, z0\.b, \1
@@ -184,7 +184,7 @@ TEST_UNIFORM_Z (qsub_1_u8_m_tied1, svuint8_t,
z0 = svqsub_m (p0, z0, 1))
/*
-** qsub_1_u8_m_untied: { xfail *-*-* }
+** qsub_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** uqsub z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s16.c
index 577310d..ed31517 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (qsubr_w0_s16_m_tied1, svint16_t, int16_t,
z0 = svqsubr_m (p0, z0, x0))
/*
-** qsubr_w0_s16_m_untied: { xfail *-*-* }
+** qsubr_w0_s16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** sqsubr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_s16_m_tied1, svint16_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_s16_m_untied: { xfail *-*-* }
+** qsubr_1_s16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** sqsubr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s32.c
index f6a06c3..810e01e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_s32_m_tied1, svint32_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_s32_m_untied: { xfail *-*-* }
+** qsubr_1_s32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** sqsubr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s64.c
index 12b0635..03a4eeb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_s64_m_tied1, svint64_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_s64_m_untied: { xfail *-*-* }
+** qsubr_1_s64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** sqsubr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s8.c
index ce814a8..88c5387 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_s8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (qsubr_w0_s8_m_tied1, svint8_t, int8_t,
z0 = svqsubr_m (p0, z0, x0))
/*
-** qsubr_w0_s8_m_untied: { xfail *-*-* }
+** qsubr_w0_s8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** sqsubr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_s8_m_tied1, svint8_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_s8_m_untied: { xfail *-*-* }
+** qsubr_1_s8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** sqsubr z0\.b, p0/m, z0\.b, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u16.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u16.c
index f406bf2..974e564 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u16.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (qsubr_w0_u16_m_tied1, svuint16_t, uint16_t,
z0 = svqsubr_m (p0, z0, x0))
/*
-** qsubr_w0_u16_m_untied: { xfail *-*-* }
+** qsubr_w0_u16_m_untied:
** mov (z[0-9]+\.h), w0
** movprfx z0, z1
** uqsubr z0\.h, p0/m, z0\.h, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_u16_m_tied1, svuint16_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_u16_m_untied: { xfail *-*-* }
+** qsubr_1_u16_m_untied:
** mov (z[0-9]+\.h), #1
** movprfx z0, z1
** uqsubr z0\.h, p0/m, z0\.h, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c
index 5c4bc9e..54c9bda 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u32.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_u32_m_tied1, svuint32_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_u32_m_untied: { xfail *-*-* }
+** qsubr_1_u32_m_untied:
** mov (z[0-9]+\.s), #1
** movprfx z0, z1
** uqsubr z0\.s, p0/m, z0\.s, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c
index d0d146e..75769d5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u64.c
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_u64_m_tied1, svuint64_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_u64_m_untied: { xfail *-*-* }
+** qsubr_1_u64_m_untied:
** mov (z[0-9]+\.d), #1
** movprfx z0, z1
** uqsubr z0\.d, p0/m, z0\.d, \1
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c
index 7b487fd..279d611 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qsubr_u8.c
@@ -43,7 +43,7 @@ TEST_UNIFORM_ZX (qsubr_w0_u8_m_tied1, svuint8_t, uint8_t,
z0 = svqsubr_m (p0, z0, x0))
/*
-** qsubr_w0_u8_m_untied: { xfail *-*-* }
+** qsubr_w0_u8_m_untied:
** mov (z[0-9]+\.b), w0
** movprfx z0, z1
** uqsubr z0\.b, p0/m, z0\.b, \1
@@ -64,7 +64,7 @@ TEST_UNIFORM_Z (qsubr_1_u8_m_tied1, svuint8_t,
z0 = svqsubr_m (p0, z0, 1))
/*
-** qsubr_1_u8_m_untied: { xfail *-*-* }
+** qsubr_1_u8_m_untied:
** mov (z[0-9]+\.b), #1
** movprfx z0, z1
** uqsubr z0\.b, p0/m, z0\.b, \1