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| author | Walter Lee <walt@tilera.com> | 2014-01-25 20:31:38 +0000 |
|---|---|---|
| committer | Walter Lee <walt@gcc.gnu.org> | 2014-01-25 20:31:38 +0000 |
| commit | 6bb0e2489c855b8354797a846d84bf6bab41bee5 (patch) | |
| tree | 5ed75958dd3ab804e74189889881a2306ffcaa87 | |
| parent | dab03fe308a782020a40734cf97dfe01e3cbc8ba (diff) | |
| download | gcc-6bb0e2489c855b8354797a846d84bf6bab41bee5.zip gcc-6bb0e2489c855b8354797a846d84bf6bab41bee5.tar.gz gcc-6bb0e2489c855b8354797a846d84bf6bab41bee5.tar.bz2 | |
sync.md (atomic_fetch_sub): Fix negation and avoid clobbering a live register.
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilegx/sync.md (atomic_fetch_sub): Fix negation and
avoid clobbering a live register.
From-SVN: r207084
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/tilegx/sync.md | 11 |
2 files changed, 14 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index db40e18..ccbea0f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2014-01-25 Walter Lee <walt@tilera.com> + * config/tilegx/sync.md (atomic_fetch_sub): Fix negation and + avoid clobbering a live register. + +2014-01-25 Walter Lee <walt@tilera.com> + * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins): Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}. * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins): diff --git a/gcc/config/tilegx/sync.md b/gcc/config/tilegx/sync.md index 5860257..3d93493 100644 --- a/gcc/config/tilegx/sync.md +++ b/gcc/config/tilegx/sync.md @@ -150,15 +150,22 @@ (match_operand:SI 3 "const_int_operand" "")] ;; model "" { + rtx addend; enum memmodel model = (enum memmodel) INTVAL (operands[3]); if (operands[2] != const0_rtx) - emit_move_insn (operands[2], gen_rtx_NEG (<MODE>mode, operands[2])); + { + addend = gen_reg_rtx (<MODE>mode); + emit_move_insn (addend, + gen_rtx_MINUS (<MODE>mode, const0_rtx, operands[2])); + } + else + addend = operands[2]; tilegx_pre_atomic_barrier (model); emit_insn (gen_atomic_fetch_add_bare<mode> (operands[0], operands[1], - operands[2])); + addend)); tilegx_post_atomic_barrier (model); DONE; }) |