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authorThomas Preud'homme <thomas.preudhomme@arm.com>2017-06-15 09:31:04 +0000
committerThomas Preud'homme <thopre01@gcc.gnu.org>2017-06-15 09:31:04 +0000
commit6820664ac6c49245baec9e9a76945cf6991c13e2 (patch)
treeff606e37567601acc140fdeb87420e156a754773
parent41c540fc0f9673fbd37cc6e8fd4e1db1da4ef3c5 (diff)
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[ARM] Make gcc.target/arm/its.c more robust
2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/testsuite/ * gcc.target/arm/its.c: Check that no IT blocks has more than 2 instructions in it rather than the number of IT blocks being 2. Transfer scan directive arm_thumb2 restriction to the whole testcase and restrict further to Thumb-only targets. From-SVN: r249215
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/arm/its.c6
2 files changed, 12 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5e05a35..4b7433e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * gcc.target/arm/its.c: Check that no IT blocks has more than 2
+ instructions in it rather than the number of IT blocks being 2.
+ Transfer scan directive arm_thumb2 restriction to the whole
+ testcase and restrict further to Thumb-only targets.
+
2017-06-15 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/sdiv_costs_1.c:
diff --git a/gcc/testsuite/gcc.target/arm/its.c b/gcc/testsuite/gcc.target/arm/its.c
index 5425f1e..f81a0df 100644
--- a/gcc/testsuite/gcc.target/arm/its.c
+++ b/gcc/testsuite/gcc.target/arm/its.c
@@ -1,4 +1,6 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_cortex_m } */
+/* { dg-require-effective-target arm_thumb2 } */
/* { dg-options "-O2" } */
int test (int a, int b)
{
@@ -17,4 +19,6 @@ int test (int a, int b)
r -= 3;
return r;
}
-/* { dg-final { scan-assembler-times "\tit" 2 { target arm_thumb2 } } } */
+/* Ensure there is no IT block with more than 2 instructions, ie. we only allow
+ IT, ITT and ITE. */
+/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */