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| author | Brendan Kehoe <brendan@gcc.gnu.org> | 1997-06-05 22:20:14 -0400 |
|---|---|---|
| committer | Brendan Kehoe <brendan@gcc.gnu.org> | 1997-06-05 22:20:14 -0400 |
| commit | 67de45a8ddc7cdab8485dc1103885c7739711165 (patch) | |
| tree | d32ce468cc1c82a957b07c5722d70e1e2c91f971 | |
| parent | c4a33af7a7dce38c168cc2afe5a9dfa285c7e946 (diff) | |
| download | gcc-67de45a8ddc7cdab8485dc1103885c7739711165.zip gcc-67de45a8ddc7cdab8485dc1103885c7739711165.tar.gz gcc-67de45a8ddc7cdab8485dc1103885c7739711165.tar.bz2 | |
vx960-coff.h (CPP_SPEC): Always define CPU, even if they use -ansi...
* i960/vx960-coff.h (CPP_SPEC): Always define CPU, even if they
use -ansi; the VxWorks headers assume it's always present.
From-SVN: r14158
| -rw-r--r-- | gcc/config/i960/vx960-coff.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/gcc/config/i960/vx960-coff.h b/gcc/config/i960/vx960-coff.h index 3e12bbe..b2e93fb 100644 --- a/gcc/config/i960/vx960-coff.h +++ b/gcc/config/i960/vx960-coff.h @@ -35,7 +35,10 @@ Boston, MA 02111-1307, USA. */ #define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960 -Dvxworks -Acpu(i960) -Amachine(i960)" /* The VxWorks header files expect the compiler to define CPU to a - magic number. */ + magic number. Note that we define CPU here even if the user + has specified -ansi. This violates user namespace, but the VxWorks + headers, and potentially user code, all explicitly rely upon the + definition of CPU in order to get the proper processor information. */ #undef CPP_SPEC #define CPP_SPEC "%{mic*:-D__i960\ @@ -44,16 +47,16 @@ Boston, MA 02111-1307, USA. */ %{mmc:-D__i960MC}\ %{mca:-D__i960CA}%{mcc:-D__i960CC}\ %{mcf:-D__i960CF}}\ - %{mka:-D__i960KA__ -D__i960_KA__ %{!ansi:-DCPU=I960KA}}\ - %{mkb:-D__i960KB__ -D__i960_KB__ %{!ansi:-DCPU=I960KB}}\ + %{mka:-D__i960KA__ -D__i960_KA__ -DCPU=I960KA}\ + %{mkb:-D__i960KB__ -D__i960_KB__ -DCPU=I960KB}\ %{msa:-D__i960SA__ -D__i960_SA__}\ %{msb:-D__i960SB__ -D__i960_SB__}\ %{mmc:-D__i960MC__ -D__i960_MC__}\ - %{mca:-D__i960CA__ -D__i960_CA__ %{!ansi:-DCPU=I960CA}}\ + %{mca:-D__i960CA__ -D__i960_CA__ -DCPU=I960CA}\ %{mcc:-D__i960CC__ -D__i960_CC__}\ %{mcf:-D__i960CF__ -D__i960_CF__}\ %{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:\ - %{!mcc:%{!mcf:-D__i960_CA -D__i960CA__ %{!ansi:-DCPU=I960CA}\ + %{!mcc:%{!mcf:-D__i960_CA -D__i960CA__ -DCPU=I960CA\ %{mic*:-D__i960CA}}}}}}}}}" /* Default to -mca. */ |