aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorH.J. Lu <hjl@gcc.gnu.org>2007-08-27 07:14:31 -0700
committerH.J. Lu <hjl@gcc.gnu.org>2007-08-27 07:14:31 -0700
commit62d75179760ebc60b025194c86ae0b5ee3695fe0 (patch)
tree74057d0c8939679c68d2a3aa3e5c182f1385c913
parentb5deb7b691b1ef2afe673899d021e17143e0c957 (diff)
downloadgcc-62d75179760ebc60b025194c86ae0b5ee3695fe0.zip
gcc-62d75179760ebc60b025194c86ae0b5ee3695fe0.tar.gz
gcc-62d75179760ebc60b025194c86ae0b5ee3695fe0.tar.bz2
re PR target/31385 (gcc fails to find spill register for decimal arithmetic)
gcc/ 2007-08-27 H.J. Lu <hongjiu.lu@intel.com> PR target/31385 * config/i386/i386.h (VALID_DFP_MODE_P): New. * config/i386/i386.c (ix86_hard_regno_mode_ok): Allow DFP in GPR. gcc/testsuite/ 2007-08-27 H.J. Lu <hongjiu.lu@intel.com> PR target/31385 * gcc.dg/dfp/pr31385.c: New. From-SVN: r127833
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/i386/i386.h3
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.dg/dfp/pr31385.c30
5 files changed, 48 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e88e7c9..91d1bfa 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,13 @@
+2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/31385
+ * config/i386/i386.h (VALID_DFP_MODE_P): New.
+ * config/i386/i386.c (ix86_hard_regno_mode_ok): Allow DFP in
+ GPR.
+
2007-08-27 Sandra Loosemore <sandra@codesourcery.com>
David Ung <davidu@mips.com>
- Nigel Stephens <nigel@mips.com>
+ Nigel Stephens <nigel@mips.com>
Separate target-specific initialization from general
back-end initialization.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 42684db..7fdae6c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -20568,6 +20568,8 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode)
return 1;
else if (VALID_FP_MODE_P (mode))
return 1;
+ else if (VALID_DFP_MODE_P (mode))
+ return 1;
/* Lots of MMX code casts 8 byte vector modes to DImode. If we then go
on to use that value in smaller contexts, this can easily force a
pseudo to be allocated to GENERAL_REGS. Since this is no worse than
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 471e342..93e24dd 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1088,6 +1088,9 @@ do { \
place emms and femms instructions. */
#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD)
+#define VALID_DFP_MODE_P(MODE) \
+ ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
+
#define VALID_FP_MODE_P(MODE) \
((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
|| (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d48907c..301693a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/31385
+ * gcc.dg/dfp/pr31385.c: New.
+
2007-08-27 Uros Bizjak <ubizjak@gmail.com>
* gcc.dg/unsigned-long-compare.c: Remove target selector.
diff --git a/gcc/testsuite/gcc.dg/dfp/pr31385.c b/gcc/testsuite/gcc.dg/dfp/pr31385.c
new file mode 100644
index 0000000..63a23c4
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/dfp/pr31385.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu99 -O2" } */
+
+typedef _Decimal32 fp_t;
+
+extern fp_t g(fp_t);
+
+fp_t
+bug(fp_t x)
+{
+ fp_t result;
+ int n;
+ fp_t f, f3, y, z;
+
+ n = 0;
+ y = 1.DF;
+ f = g(x);
+
+ if (f < 0.DF)
+ f = -f;
+
+ f3 = 2.DF;
+
+ z = (y + y + f / (y * y));
+ y = (z + z) / (9.DF) + f3 / (z * z);
+
+ result = y;
+
+ return (result);
+}