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authorSimplyTheOther <simplytheother@gmail.com>2020-06-22 11:56:33 +0800
committerPhilip Herron <philip.herron@embecosm.com>2020-11-28 21:13:17 +0000
commit6206176647eed0b386a3aa1831fe29d4e76230a6 (patch)
tree1f479648ebb8a699e277ee388729596f3606feb4
parent3e34ae54b071ebda46d7226b03b4bc32859dee68 (diff)
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Added IA-64 target hook (should be okay but still should have some later attention)
-rw-r--r--gcc/config.gcc1
-rw-r--r--gcc/config/ia64/ia64-protos.h3
-rw-r--r--gcc/config/ia64/ia64-rust.c127
-rw-r--r--gcc/config/ia64/ia64.h2
-rw-r--r--gcc/config/ia64/t-ia644
5 files changed, 137 insertions, 0 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 46beda4..7fc3a96 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -471,6 +471,7 @@ x86_64-*-*)
hresetintrin.h keylockerintrin.h avxvnniintrin.h"
;;
ia64-*-*)
+ rust_target_objs="ia64-rust.o"
extra_headers=ia64intrin.h
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h
index c5d8984..bf49744 100644
--- a/gcc/config/ia64/ia64-protos.h
+++ b/gcc/config/ia64/ia64-protos.h
@@ -65,6 +65,9 @@ extern void ia64_expand_vec_perm_even_odd (rtx, rtx, rtx, int);
extern void ia64_expand_vec_setv2sf (rtx op[3]);
#endif /* RTX_CODE */
+/* Defined in ia64-rust.c */
+extern void ia64_rust_target_cpu_info (void);
+
#ifdef TREE_CODE
#ifdef RTX_CODE
extern rtx ia64_expand_builtin (tree, rtx, rtx, machine_mode, int);
diff --git a/gcc/config/ia64/ia64-rust.c b/gcc/config/ia64/ia64-rust.c
new file mode 100644
index 0000000..0dac53d
--- /dev/null
+++ b/gcc/config/ia64/ia64-rust.c
@@ -0,0 +1,127 @@
+/* Subroutines for the Rust front end for the IA-64 architecture.
+ Copyright (C) 2020 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_p.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_CPU_INFO for IA-64 targets. */
+
+void ia64_rust_target_cpu_info(void) {
+ rust_add_target_info("target_arch", "ia64");
+
+ // llvm does not appear to have defined features at any point for IA-64, so I made up names
+ // TODO: should sub-arches be defined here?
+ if (TARGET_GNU_AS)
+ rust_add_target_info("target_feature", "gnu-as");
+ if (TARGET_GNU_LD)
+ rust_add_target_info("target_feature", "gnu-ld");
+ if (TARGET_VOL_ASM_STOP)
+ rust_add_target_info("target_feature", "volatile-asm-stop");
+ if (TARGET_REG_NAMES)
+ rust_add_target_info("target_feature", "register-names");
+ if (TARGET_NO_SDATA)
+ rust_add_target_info("target_feature", "no-sdata");
+ else
+ rust_add_target_info("target_feature", "sdata");
+ if (TARGET_NO_PIC)
+ rust_add_target_info("target_feature", "no-pic");
+ if (TARGET_CONST_GP)
+ rust_add_target_info("target_feature", "constant-gp");
+ if (TARGET_AUTO_PIC)
+ rust_add_target_info("target_feature", "auto-pic");
+
+ switch (TARGET_INLINE_FLOAT_DIV) {
+ case 0:
+ rust_add_target_info("target_feature", "no-inline-float-divide");
+ break;
+ case 1:
+ rust_add_target_info("target_feature", "inline-float-divide-min-latency");
+ break;
+ case 2:
+ rust_add_target_info("target_feature", "inline-float-divide-max-throughput");
+ break;
+ default: // TODO: is this an error? should this be an error?
+ break;
+ }
+ switch (TARGET_INLINE_INT_DIV) {
+ case 0:
+ rust_add_target_info("target_feature", "no-inline-int-divide");
+ break;
+ case 1:
+ rust_add_target_info("target_feature", "inline-int-divide-min-latency");
+ break;
+ case 2:
+ rust_add_target_info("target_feature", "inline-int-divide-max-throughput");
+ break;
+ default: // TODO: is this an error? should this be an error?
+ break;
+ }
+ switch (TARGET_INLINE_SQRT) {
+ case 0:
+ rust_add_target_info("target_feature", "no-inline-sqrt");
+ break;
+ case 1:
+ rust_add_target_info("target_feature", "inline-sqrt-min-latency");
+ break;
+ case 2:
+ rust_add_target_info("target_feature", "inline-sqrt-max-throughput");
+ break;
+ default: // TODO: is this an error? should this be an error?
+ break;
+ }
+
+ if (TARGET_DWARF2_ASM)
+ rust_add_target_info("target_feature", "dwarf2-asm");
+ if (TARGET_EARLY_STOP_BITS)
+ rust_add_target_info("target_feature", "early-stop-bits");
+ // TODO: do fixed-range somehow (wouldn't work well as define, I don't think), same for tls-size
+
+ /* TODO: ensure that these variables below are actually accessible, and work (i.e. condition test not
+ * wrong way around). */
+ if (mflag_sched_br_data_spec)
+ rust_add_target_info("target_feature", "sched-br-data-spec");
+ if (mflag_sched_ar_data_spec)
+ rust_add_target_info("target_feature", "sched-ar-data-spec");
+ if (mflag_sched_control_spec)
+ rust_add_target_info("target_feature", "sched-control-spec");
+ if (mflag_sched_br_in_data_spec)
+ rust_add_target_info("target_feature", "sched-br-in-data-spec");
+ if (mflag_sched_ar_in_data_spec)
+ rust_add_target_info("target_feature", "sched-ar-in-data-spec");
+ if (mflag_sched_in_control_spec)
+ rust_add_target_info("target_feature", "sched-in-control-spec");
+ if (mflag_sched_spec_ldc)
+ rust_add_target_info("target_feature", "sched-spec-ldc");
+ if (mflag_sched_spec_control_ldc)
+ rust_add_target_info("target_feature", "sched-spec-control-ldc");
+ if (mflag_sched_count_spec_in_critical_path)
+ rust_add_target_info("target_feature", "sched-count-spec-in-critical-path");
+ if (mflag_sched_stop_bits_after_every_cycle)
+ rust_add_target_info("target_feature", "sched-stop-bits-after-every-cycle");
+ if (mflag_sched_fp_mem_deps_zero_cost)
+ rust_add_target_info("target_feature", "sched-fp-mem-deps-zero-cost");
+ if (mflag_sched_mem_insns_hard_limit)
+ rust_add_target_info("target_feature", "sched-max-memory-insns-hard-limit");
+ if (mflag_sel_sched_dont_check_control_spec)
+ rust_add_target_info("target_feature", "sel-sched-dont-check-control-spec");
+ // TODO: do sched-max-memory-insns somehow (wouldn't work well as define)
+}
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index d5acc62..2244743 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -43,6 +43,8 @@ do { \
builtin_define("__SIZEOF_FLOAT128__=16");\
} while (0)
+#define TARGET_RUST_CPU_INFO ia64_rust_target_cpu_info
+
#ifndef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS
#endif
diff --git a/gcc/config/ia64/t-ia64 b/gcc/config/ia64/t-ia64
index 10ef7ed..da63735 100644
--- a/gcc/config/ia64/t-ia64
+++ b/gcc/config/ia64/t-ia64
@@ -21,6 +21,10 @@ ia64-c.o: $(srcdir)/config/ia64/ia64-c.c $(CONFIG_H) $(SYSTEM_H) \
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/ia64/ia64-c.c
+ia64-rust.o: $(srcdir)/config/ia64/ia64-rust.c \
+ $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(C_COMMON_H)
+ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
+
# genattrtab generates very long string literals.
insn-attrtab.o-warn = -Wno-error