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author | Pan Li <pan2.li@intel.com> | 2023-07-18 10:45:27 +0800 |
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committer | Pan Li <pan2.li@intel.com> | 2023-07-18 10:55:25 +0800 |
commit | 61ec6a45ae3bb741b3afef41cef01094930adf7f (patch) | |
tree | 7a15401c39e0af1f9b0ba7519cd1e79e8bb93bbb | |
parent | 45dd1d91671cbc4a868ec41ada5f070aa487d02d (diff) | |
download | gcc-61ec6a45ae3bb741b3afef41cef01094930adf7f.zip gcc-61ec6a45ae3bb741b3afef41cef01094930adf7f.tar.gz gcc-61ec6a45ae3bb741b3afef41cef01094930adf7f.tar.bz2 |
RISC-V: Fix RVV frm run test failure on RV32
Refine the run test case to avoid interactive checking in RV32, by
separating each checks in different functions.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Fix run failure.
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c | 59 |
1 files changed, 36 insertions, 23 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c index 245ce7d..1b2789a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c @@ -5,6 +5,24 @@ #include <stdio.h> #include <stdint-gcc.h> +#define DEFINE_TEST_FUNC(FRM) \ +vfloat32m1_t __attribute__ ((noinline)) \ +test_float_point_frm_run_##FRM (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) \ +{ \ + vfloat32m1_t result; \ + \ + set_frm (0); \ + \ + result = __riscv_vfadd_vv_f32m1_rm (op1, result, FRM, vl); \ + \ + assert_equal (FRM, get_frm (), "The value of frm should be " #FRM "."); \ + \ + return result; \ +} + +#define RUN_TEST_FUNC(FRM, op1, op2, vl) \ + test_float_point_frm_run_##FRM (op1, op2, vl) + static int get_frm () { @@ -41,28 +59,11 @@ assert_equal (int a, int b, char *message) } } -vfloat32m1_t __attribute__ ((noinline)) -test_float_point_frm_run (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) -{ - vfloat32m1_t result; - - result = __riscv_vfadd_vv_f32m1_rm (op1, result, 1, vl); - assert_equal (1, get_frm (), "The value of frm register should be 1."); - - result = __riscv_vfadd_vv_f32m1_rm (op1, result, 2, vl); - assert_equal (2, get_frm (), "The value of frm register should be 2."); - - result = __riscv_vfadd_vv_f32m1_rm (op1, result, 3, vl); - assert_equal (3, get_frm (), "The value of frm register should be 3."); - - result = __riscv_vfadd_vv_f32m1_rm (op1, result, 4, vl); - assert_equal (4, get_frm (), "The value of frm register should be 4."); - - result = __riscv_vfadd_vv_f32m1_rm (op1, result, 0, vl); - assert_equal (0, get_frm (), "The value of frm register should be 0."); - - return result; -} +DEFINE_TEST_FUNC (0) +DEFINE_TEST_FUNC (1) +DEFINE_TEST_FUNC (2) +DEFINE_TEST_FUNC (3) +DEFINE_TEST_FUNC (4) int main () @@ -72,8 +73,20 @@ main () vfloat32m1_t op2; set_frm (4); - test_float_point_frm_run (op1, op2, vl); + RUN_TEST_FUNC (0, op1, op2, vl); + assert_equal (4, get_frm (), "The value of frm register should be 4."); + + RUN_TEST_FUNC (1, op1, op2, vl); + assert_equal (4, get_frm (), "The value of frm register should be 4."); + + RUN_TEST_FUNC (2, op1, op2, vl); + assert_equal (4, get_frm (), "The value of frm register should be 4."); + + RUN_TEST_FUNC (3, op1, op2, vl); + assert_equal (4, get_frm (), "The value of frm register should be 4."); + + RUN_TEST_FUNC (4, op1, op2, vl); assert_equal (4, get_frm (), "The value of frm register should be 4."); return 0; |