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| author | Li Wei <liwei@loongson.cn> | 2023-11-17 10:38:02 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2023-11-17 16:39:08 +0800 |
| commit | 5c8cb429762062f851a56801f021d81f4ecfe3d9 (patch) | |
| tree | a26e9423b2188ee1b097c24c1548a3c07082a096 | |
| parent | 1bcb7fe60544bba8b88028f9ffa062336d399664 (diff) | |
| download | gcc-5c8cb429762062f851a56801f021d81f4ecfe3d9.zip gcc-5c8cb429762062f851a56801f021d81f4ecfe3d9.tar.gz gcc-5c8cb429762062f851a56801f021d81f4ecfe3d9.tar.bz2 | |
LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO
The LoongArch has defined ctz and clz on the backend, but if we want GCC
do CTZ transformation optimization in forwprop2 pass, GCC need to know
the value of c[lt]z at zero, which may be beneficial for some test cases
(like spec2017 deepsjeng_r).
After implementing the macro, we test dynamic instruction count on
deepsjeng_r:
- before 1688423249186
- after 1660311215745 (1.66% reduction)
gcc/ChangeLog:
* config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
Implement.
(CTZ_DEFINED_VALUE_AT_ZERO): Same.
gcc/testsuite/ChangeLog:
* gcc.dg/pr90838.c: add clz/ctz test support on LoongArch.
| -rw-r--r-- | gcc/config/loongarch/loongarch.h | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr90838.c | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index ddac8e9..115222e 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -1239,3 +1239,8 @@ struct GTY (()) machine_function #define TARGET_EXPLICIT_RELOCS \ (la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS) + +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ + ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2) +#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ + ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2) diff --git a/gcc/testsuite/gcc.dg/pr90838.c b/gcc/testsuite/gcc.dg/pr90838.c index 7590596..40aad70 100644 --- a/gcc/testsuite/gcc.dg/pr90838.c +++ b/gcc/testsuite/gcc.dg/pr90838.c @@ -83,3 +83,8 @@ int ctz4 (unsigned long x) /* { dg-final { scan-assembler-times "ctz\t" 3 { target { rv32 } } } } */ /* { dg-final { scan-assembler-times "andi\t" 1 { target { rv32 } } } } */ /* { dg-final { scan-assembler-times "mul\t" 1 { target { rv32 } } } } */ + +/* { dg-final { scan-tree-dump-times {= \.CTZ} 4 "forwprop2" { target { loongarch64*-*-* } } } } */ +/* { dg-final { scan-assembler-times "ctz.d\t" 1 { target { loongarch64*-*-* } } } } */ +/* { dg-final { scan-assembler-times "ctz.w\t" 3 { target { loongarch64*-*-* } } } } */ +/* { dg-final { scan-assembler-times "andi\t" 4 { target { loongarch64*-*-* } } } } */ |