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| author | Patrick O'Neill <patrick@rivosinc.com> | 2023-09-19 10:03:35 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-09-19 14:17:31 -0700 |
| commit | 5b554c559d0103bfc1a68777907945ec3035a2bd (patch) | |
| tree | a12c934a17e80ebcf6eaa626552ed656d243ba41 | |
| parent | 7a4e57ffc9a97f172487dab81123ad62bebd4997 (diff) | |
| download | gcc-5b554c559d0103bfc1a68777907945ec3035a2bd.zip gcc-5b554c559d0103bfc1a68777907945ec3035a2bd.tar.gz gcc-5b554c559d0103bfc1a68777907945ec3035a2bd.tar.bz2 | |
RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap
Resolves PR 111461.
during RTL pass: expand
offtime.c: In function '__offtime':
offtime.c:79:6: internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have 'w' (rtx const_int) in riscv_legitimize_const_move, at config/riscv/riscv.cc:2176
79 | ip = __mon_yday[__isleap(y)];
Tested on rv32gc glibc with --enable-checking=rtl.
2023-09-19 Juzhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
src_op_0 var to avoid rtl check error.
Tested-by: Patrick O'Neill <patrick@rivosinc.com>
| -rw-r--r-- | gcc/config/riscv/riscv.cc | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index f1b721d..29d439b 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2173,16 +2173,14 @@ riscv_legitimize_const_move (machine_mode mode, rtx dest, rtx src) (const_poly_int:DI [16, 16]) // <- op_1 )) */ - rtx src_op_0 = XEXP (src, 0); - - if (GET_CODE (src) == CONST && GET_CODE (src_op_0) == PLUS - && CONST_POLY_INT_P (XEXP (src_op_0, 1))) + if (GET_CODE (src) == CONST && GET_CODE (XEXP (src, 0)) == PLUS + && CONST_POLY_INT_P (XEXP (XEXP (src, 0), 1))) { rtx dest_tmp = gen_reg_rtx (mode); rtx tmp = gen_reg_rtx (mode); - riscv_emit_move (dest, XEXP (src_op_0, 0)); - riscv_legitimize_poly_move (mode, dest_tmp, tmp, XEXP (src_op_0, 1)); + riscv_emit_move (dest, XEXP (XEXP (src, 0), 0)); + riscv_legitimize_poly_move (mode, dest_tmp, tmp, XEXP (XEXP (src, 0), 1)); emit_insn (gen_rtx_SET (dest, gen_rtx_PLUS (mode, dest, dest_tmp))); return; |