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| author | Jeff Law <jlaw@ventanamicro.com> | 2023-12-02 22:16:33 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2023-12-02 22:17:57 -0700 |
| commit | 595c695216e72c8491bf20d30e5298e2064caa73 (patch) | |
| tree | b75225e1bd7019f4ff606caceabe0ed562984cf9 | |
| parent | 2280317c3771a28e9288b7f4c4c23aa4b0ac31dd (diff) | |
| download | gcc-595c695216e72c8491bf20d30e5298e2064caa73.zip gcc-595c695216e72c8491bf20d30e5298e2064caa73.tar.gz gcc-595c695216e72c8491bf20d30e5298e2064caa73.tar.bz2 | |
[committed] Fix a few arc tests
Similar to others. Where it's easy to fix the implicit types or add prototypes
I did. One was just ugly and I didn't want to think too hard, so I just added
-fpermissive.
Pushed to the trunk.
gcc/testsuite
* gcc.target/arc/lra-1.c: Fix missing prototypes and implicit
types in variable definitions.
* gcc.target/arc/pic-1.c: Similarly.
* gcc.target/arc/pr9001191897.c: Similarly.
* gcc.target/arc/pr9001195952.c: Add -fpermissive.
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/lra-1.c | 12 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/pic-1.c | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/pr9001191897.c | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/pr9001195952.c | 2 |
4 files changed, 14 insertions, 6 deletions
diff --git a/gcc/testsuite/gcc.target/arc/lra-1.c b/gcc/testsuite/gcc.target/arc/lra-1.c index 27336d1..3c93645 100644 --- a/gcc/testsuite/gcc.target/arc/lra-1.c +++ b/gcc/testsuite/gcc.target/arc/lra-1.c @@ -4,12 +4,16 @@ /* ap is replaced with an address like base+offset by lra, where offset is larger than s9, resulting into an ICE. */ -typedef struct { char a[500] } b; -c; +typedef struct { char a[500]; } b; +int c; struct d { short e; - b f -} g(int h, int i, int j, int k, char l, int m, int n, char *p) { + b f; +}; + +int q (struct d); + +struct d g(int h, int i, int j, int k, char l, int m, int n, char *p) { again:; struct d o; *p = c = ({ q(o); }); diff --git a/gcc/testsuite/gcc.target/arc/pic-1.c b/gcc/testsuite/gcc.target/arc/pic-1.c index ab24763..ed1e4d3 100644 --- a/gcc/testsuite/gcc.target/arc/pic-1.c +++ b/gcc/testsuite/gcc.target/arc/pic-1.c @@ -3,6 +3,9 @@ /* { dg-skip-if "PIC not available for ARC6xx" { arc6xx } } */ /* { dg-options "-mno-sdata -w -Os -fpic" } */ +void e (char); + +void a() { char *b = ""; char c; diff --git a/gcc/testsuite/gcc.target/arc/pr9001191897.c b/gcc/testsuite/gcc.target/arc/pr9001191897.c index fc36426..d51b042 100644 --- a/gcc/testsuite/gcc.target/arc/pr9001191897.c +++ b/gcc/testsuite/gcc.target/arc/pr9001191897.c @@ -1,7 +1,8 @@ /* { dg-do compile } */ /* { dg-skip-if "" { ! { clmcpu } } } */ /* { dg-options "-mcpu=archs -Os -fpic -mno-sdata -mno-indexed-loads -w" } */ -a; +int a; +void c() { static char b[25]; for (; a >= 0; a--) diff --git a/gcc/testsuite/gcc.target/arc/pr9001195952.c b/gcc/testsuite/gcc.target/arc/pr9001195952.c index 252438d..f820960 100644 --- a/gcc/testsuite/gcc.target/arc/pr9001195952.c +++ b/gcc/testsuite/gcc.target/arc/pr9001195952.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-skip-if "" { ! { clmcpu } } } */ -/* { dg-options "-mcpu=archs -Os -w -fpic" } */ +/* { dg-options "-mcpu=archs -Os -w -fpic -fpermissive" } */ /* tst_movb split pattern is wrong for anything else than NPS chip. */ |