sse5-hadduX.c: Remove target selector.

        * gcc.target/i386/sse5-hadduX.c: Remove target selector.
        * gcc.target/i386/sse5-haddX.c: Ditto.
        * gcc.target/i386/sse5-hsubX.c: Ditto.
        * gcc.target/i386/sse5-maccXX.c: Ditto.
        * gcc.target/i386/sse5-msubXX.c: Ditto.
        * gcc.target/i386/sse5-nmaccXX.c: Ditto.
        * gcc.target/i386/sse5-nmsubXX.c: Ditto.
        * gcc.target/i386/sse5-permpX.c: Ditto.
        * gcc.target/i386/sse5-fma.c: Remove target selector. Require lp64
        effective target.
        * gcc.target/i386/sse5-fma-vector.c: Ditto.
        * gcc.target/i386/sse5-ima-vector.c: Ditto.
        * gcc.target/i386/sse5-pcmov.c: Ditto.
        * gcc.target/i386/sse5-pcmov2.c: Ditto.

From-SVN: r128667

14 files changed, 35 insertions, 13 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5b5a36f..0b3c194 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2007-09-22  Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.target/i386/sse5-hadduX.c: Remove target selector.
+	* gcc.target/i386/sse5-haddX.c: Ditto.
+	* gcc.target/i386/sse5-hsubX.c: Ditto.
+	* gcc.target/i386/sse5-maccXX.c: Ditto.
+	* gcc.target/i386/sse5-msubXX.c: Ditto.
+	* gcc.target/i386/sse5-nmaccXX.c: Ditto.
+	* gcc.target/i386/sse5-nmsubXX.c: Ditto.
+	* gcc.target/i386/sse5-permpX.c: Ditto.
+	* gcc.target/i386/sse5-fma.c: Remove target selector. Require lp64
+	effective target.
+	* gcc.target/i386/sse5-fma-vector.c: Ditto.
+	* gcc.target/i386/sse5-ima-vector.c: Ditto.
+	* gcc.target/i386/sse5-pcmov.c: Ditto.
+	* gcc.target/i386/sse5-pcmov2.c: Ditto.
+
 2007-09-22  Richard Guenther  <rguenther@suse.de>
 
 	PR tree-optimization/33146
diff --git a/gcc/testsuite/gcc.target/i386/sse5-fma-vector.c b/gcc/testsuite/gcc.target/i386/sse5-fma-vector.c
index 59dc765..ec6388f 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-fma-vector.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-fma-vector.c
@@ -1,7 +1,8 @@
 /* Test that the compiler properly optimizes floating point multiply and add
    instructions vector into fmaddps on SSE5 systems.  */
 
-/* { dg-do compile { target x86_64-*-*} } */
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-options "-O2 -msse5 -mfused-madd -ftree-vectorize" } */
 
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/i386/sse5-fma.c b/gcc/testsuite/gcc.target/i386/sse5-fma.c
index 598cda0..d30e316 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-fma.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-fma.c
@@ -1,7 +1,8 @@
 /* Test that the compiler properly optimizes floating point multiply and add
    instructions into fmaddss, fmsubss, fnmaddss, fnmsubss on SSE5 systems.  */
 
-/* { dg-do compile { target x86_64-*-*} } */
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-options "-O2 -msse5 -mfused-madd" } */
 
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/i386/sse5-haddX.c b/gcc/testsuite/gcc.target/i386/sse5-haddX.c
index e605e07..1156f8e 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-haddX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-haddX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-hadduX.c b/gcc/testsuite/gcc.target/i386/sse5-hadduX.c
index a55fb8a..f269744 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-hadduX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-hadduX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-hsubX.c b/gcc/testsuite/gcc.target/i386/sse5-hsubX.c
index 03c7f79..b67b72a 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-hsubX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-hsubX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-ima-vector.c b/gcc/testsuite/gcc.target/i386/sse5-ima-vector.c
index 260291d..f32b0a1 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-ima-vector.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-ima-vector.c
@@ -1,7 +1,8 @@
 /* Test that the compiler properly optimizes vector 32-bit integer point
    multiply and add instructions vector into pmacsdd on SSE5 systems.  */
 
-/* { dg-do compile { target x86_64-*-*} } */
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-options "-O2 -msse5 -ftree-vectorize" } */
 
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/i386/sse5-maccXX.c b/gcc/testsuite/gcc.target/i386/sse5-maccXX.c
index 9603d53..c7bc5fe 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-maccXX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-maccXX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-msubXX.c b/gcc/testsuite/gcc.target/i386/sse5-msubXX.c
index 151e8c6..22c34c7 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-msubXX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-msubXX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-nmaccXX.c b/gcc/testsuite/gcc.target/i386/sse5-nmaccXX.c
index c5ca2bf..0614977 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-nmaccXX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-nmaccXX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-nmsubXX.c b/gcc/testsuite/gcc.target/i386/sse5-nmsubXX.c
index acf19f9..b22684c6 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-nmsubXX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-nmsubXX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/sse5-pcmov.c b/gcc/testsuite/gcc.target/i386/sse5-pcmov.c
index 3bc2e5d..f83b06b 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-pcmov.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-pcmov.c
@@ -1,7 +1,8 @@
 /* Test that the compiler properly optimizes conditional floating point moves
    into the pcmov instruction on SSE5 systems.  */
 
-/* { dg-do compile { target x86_64-*-*} } */
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-options "-O2 -msse5" } */
 
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/i386/sse5-pcmov2.c b/gcc/testsuite/gcc.target/i386/sse5-pcmov2.c
index 0bb366c..6b174d6 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-pcmov2.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-pcmov2.c
@@ -1,7 +1,8 @@
 /* Test that the compiler properly optimizes conditional floating point moves
    into the pcmov instruction on SSE5 systems.  */
 
-/* { dg-do compile { target x86_64-*-*} } */
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-options "-O2 -msse5" } */
 
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/i386/sse5-permpX.c b/gcc/testsuite/gcc.target/i386/sse5-permpX.c
index d83aa58..cae3077 100644
--- a/gcc/testsuite/gcc.target/i386/sse5-permpX.c
+++ b/gcc/testsuite/gcc.target/i386/sse5-permpX.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target sse5 } */
 /* { dg-options "-O2 -msse5" } */