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authorRichard Henderson <rth@cygnus.com>2000-07-15 13:31:27 -0700
committerRichard Henderson <rth@gcc.gnu.org>2000-07-15 13:31:27 -0700
commit557b9df5297395e5c17af73c4d360e525793d75e (patch)
treeeafb4fe2031b44b7904a4123223f90fd1b418d97
parentd4c4ae6f2f2d677ae919dd5df22512f627ecaf81 (diff)
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ia64-protos.h (ia64_move_ok): Prototype.
* config/ia64/ia64-protos.h (ia64_move_ok): Prototype. * config/ia64/ia64.c (ia64_move_ok): New function. * config/ia64/ia64.md (movqi, movqi_internal): Use it. (movhi, movsi, movdi, movsf, movdf, movxf): Likewise. From-SVN: r35054
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/ia64/ia64-protos.h1
-rw-r--r--gcc/config/ia64/ia64.c24
-rw-r--r--gcc/config/ia64/ia64.md56
4 files changed, 53 insertions, 35 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index de60142..5fc1ba1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2000-07-15 Richard Henderson <rth@cygnus.com>
+
+ * config/ia64/ia64-protos.h (ia64_move_ok): Prototype.
+ * config/ia64/ia64.c (ia64_move_ok): New function.
+ * config/ia64/ia64.md (movqi, movqi_internal): Use it.
+ (movhi, movsi, movdi, movsf, movdf, movxf): Likewise.
+
2000-07-15 Zack Weinberg <zack@wolery.cumb.org>
* cpphash.c (save_expansion): Clear PREV_WHITE on tokens
diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h
index af3e5d7..e918420 100644
--- a/gcc/config/ia64/ia64-protos.h
+++ b/gcc/config/ia64/ia64-protos.h
@@ -50,6 +50,7 @@ extern int normal_comparison_operator PARAMS((rtx, enum machine_mode));
extern int adjusted_comparison_operator PARAMS((rtx, enum machine_mode));
extern int call_multiple_values_operation PARAMS((rtx, enum machine_mode));
extern int predicate_operator PARAMS((rtx, enum machine_mode));
+extern int ia64_move_ok PARAMS((rtx, rtx));
extern void ia64_expand_fetch_and_op PARAMS ((enum fetchop_code,
enum machine_mode, rtx []));
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 3628cb4..c88f1a9 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -542,6 +542,30 @@ predicate_operator (op, mode)
return ((GET_MODE (op) == mode || mode == VOIDmode)
&& (code == EQ || code == NE));
}
+
+/* Return 1 if the operands of a move are ok. */
+
+int
+ia64_move_ok (dst, src)
+ rtx dst, src;
+{
+ /* If we're under init_recog_no_volatile, we'll not be able to use
+ memory_operand. So check the code directly and don't worry about
+ the validity of the underlying address, which should have been
+ checked elsewhere anyway. */
+ if (GET_CODE (dst) != MEM)
+ return 1;
+ if (GET_CODE (src) == MEM)
+ return 0;
+ if (register_operand (src, VOIDmode))
+ return 1;
+
+ /* Otherwise, this must be a constant, and that either 0 or 0.0 or 1.0. */
+ if (INTEGRAL_MODE_P (GET_MODE (dst)))
+ return src == const0_rtx;
+ else
+ return GET_CODE (src) == CONST_DOUBLE && CONST_DOUBLE_OK_FOR_G (src);
+}
/* Begin the assembly file. */
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index bab7b90..9c90de1 100644
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -172,16 +172,14 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (QImode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (QImode, operands[1]);
}")
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f")
(match_operand:QI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))]
- "! memory_operand (operands[0], QImode)
- || ! memory_operand (operands[1], QImode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
addl %0 = %1, r0
@@ -199,16 +197,14 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (HImode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (HImode, operands[1]);
}")
(define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f")
(match_operand:HI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))]
- "! memory_operand (operands[0], HImode)
- || !memory_operand (operands[1], HImode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
addl %0 = %1, r0
@@ -226,16 +222,14 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (SImode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (SImode, operands[1]);
}")
(define_insn "*movsi_internal"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r, m, r,*f,*f")
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f"))]
- "! memory_operand (operands[0], SImode)
- || ! memory_operand (operands[1], SImode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
addl %0 = %1, r0
@@ -301,16 +295,14 @@
}
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (DImode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (DImode, operands[1]);
}")
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r, m,r,*f,*f,*f,Q, r,*b")
(match_operand:DI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,Q,*f,*b,rO"))]
- "! memory_operand (operands[0], DImode)
- || ! memory_operand (operands[1], DImode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
addl %0 = %1, r0
@@ -401,16 +393,14 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (SFmode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (SFmode, operands[1]);
}")
(define_insn "*movsf_internal"
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m")
(match_operand:SF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))]
- "! memory_operand (operands[0], SFmode)
- || ! memory_operand (operands[1], SFmode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %F1
ldfs %0 = %1%P1
@@ -429,16 +419,14 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (DFmode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (DFmode, operands[1]);
}")
(define_insn "*movdf_internal"
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m")
(match_operand:DF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))]
- "! memory_operand (operands[0], DFmode)
- || ! memory_operand (operands[1], DFmode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %F1
ldfd %0 = %1%P1
@@ -457,17 +445,15 @@
"
{
if (! reload_in_progress && ! reload_completed
- && GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM)
- operands[1] = copy_to_mode_reg (XFmode, operands[1]);
+ && ! ia64_move_ok (operands[0], operands[1]))
+ operands[1] = force_reg (XFmode, operands[1]);
}")
;; ??? There's no easy way to mind volatile acquire/release semantics.
(define_insn "*movxf_internal"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,f, m")
(match_operand:XF 1 "general_operand" "fG,m,fG"))]
- "! memory_operand (operands[0], XFmode)
- || ! memory_operand (operands[1], XFmode)"
+ "ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %F1
ldfe %0 = %1%P1