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| author | Philipp Thomas <pthomas@suse.de> | 2000-08-30 23:08:06 +0000 |
|---|---|---|
| committer | Philipp Thomas <pthomas@gcc.gnu.org> | 2000-08-30 23:08:06 +0000 |
| commit | 4e8bd75fb6da73a3b5003304c140f7854aa3fcce (patch) | |
| tree | 14f99242155deea666307bac02575405760a8ce0 | |
| parent | b145ee27c77fcce0f4ddb7fcb09bb516fc6d499d (diff) | |
| download | gcc-4e8bd75fb6da73a3b5003304c140f7854aa3fcce.zip gcc-4e8bd75fb6da73a3b5003304c140f7854aa3fcce.tar.gz gcc-4e8bd75fb6da73a3b5003304c140f7854aa3fcce.tar.bz2 | |
gmicro.h (TARGET_SWITCHES): Add descriptions and mark them for translation.
2000-08-22 Philipp Thomas <pthomas@suse.de>
Masanobu Yuhara <yuhara@flab.fujitsu.co.jp>
* gmicro.h (TARGET_SWITCHES): Add descriptions and mark them
for translation.
Co-Authored-By: Masanobu Yuhara <yuhara@flab.fujitsu.co.jp>
From-SVN: r36078
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/gmicro/gmicro.h | 35 |
2 files changed, 25 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9f45f59..a986ca2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2000-08-22 Philipp Thomas <pthomas@suse.de> + Masanobu Yuhara <yuhara@flab.fujitsu.co.jp> + + * gmicro.h (TARGET_SWITCHES): Add descriptions and mark them + for translation. + 2000-08-30 Greg McGary <greg@mcgary.org> * Makefile.in (fixinc.sh): Pass CC, CFLAGS and LDFLAGS to mkfixinc.sh diff --git a/gcc/config/gmicro/gmicro.h b/gcc/config/gmicro/gmicro.h index 377adf1..10d3d32d 100644 --- a/gcc/config/gmicro/gmicro.h +++ b/gcc/config/gmicro/gmicro.h @@ -86,25 +86,28 @@ extern int target_flags; An empty string NAME is used to identify the default VALUE. */ #define TARGET_SWITCHES \ - { { "g300", 1}, \ - { "g200", 2}, \ - { "g100", 4}, \ - { "fpu", 8}, \ - { "soft-float", -8}, \ - { "rtd", 0x10}, \ - { "no-rtd", -0x10}, \ - { "regparm", 0x20}, \ - { "no-regparm", -0x20}, \ + { { "g300", 1, _("Compile for Gmicro/300")}, \ + { "g200", 2, _("Compile for Gmicro/200")}, \ + { "g100", 4, _("Compile for Gmicro/100")}, \ + { "fpu", 8, _("Use floating point co-processor")}, \ + { "soft-float", -8, \ + _("Do not use floating point co-processor")}, \ + { "rtd", 0x10, _("Alternate calling convention")}, \ + { "no-rtd", -0x10, _("Use normal calling convention")}, \ + { "regparm", 0x20, NULL}, \ + { "no-regparm", -0x20, NULL}, \ #if 0 /* Since we don't define PCC_BITFIELD_TYPE_MATTERS or use a large STRUCTURE_SIZE_BOUNDARY, we must have bitfield instructions. */ - { "bitfield", 0x40}, \ - { "no-bitfield", -0x40}, \ + { "bitfield", 0x40, _("Use bitfield instructions")}, \ + { "no-bitfield", -0x40, \ + _("Do not use bitfield instructions")}, \ #endif - { "newreturn", 0x80}, \ - { "no-newreturn", -0x80}, \ - { "force-smov", 0x100}, \ - { "no-force-smov", -0x100}, \ - { "", TARGET_DEFAULT}} + { "newreturn", 0x80, _("Use alternative return sequence")}, \ + { "no-newreturn", -0x80, _("Use normal return sequence")}, \ + { "force-smov", 0x100, _("Always use string instruction")}, \ + { "no-force-smov", -0x100, \ + _("Use string instruction when appropriate")}, \ + { "", TARGET_DEFAULT, NULL}} /* Blow away G100 flag silently off TARGET_fpu (since we can't clear |