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authorRichard Earnshaw <rearnsha@arm.com>1999-03-13 11:40:25 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>1999-03-13 11:40:25 +0000
commit4b632bf12c35664476b2445ed6f0295ee19e6b56 (patch)
tree3fae1b7f4220dfa1a76d91b29c2f6290a9a06aaf
parent4995028c823a83c92c43d5fbdde25be8c7ed2e6b (diff)
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arm.c (arm_split_constant): Don't try to force a constant to memory after arm_reorg has run.
* arm.c (arm_split_constant): Don't try to force a constant to memory after arm_reorg has run. (after_arm_reorg): New static variable. (arm_reorg): Set it. (output_func_epilogue): Clear it. From-SVN: r25742
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/arm/arm.c17
2 files changed, 23 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fb4c7c0..5e2ec7a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Sat Mar 13 11:36:16 1999 Richard Earnshaw (rearnsha@arm.com)
+
+ * arm.c (arm_split_constant): Don't try to force a constant to
+ memory after arm_reorg has run.
+ (after_arm_reorg): New static variable.
+ (arm_reorg): Set it.
+ (output_func_epilogue): Clear it.
+
Fri Mar 12 20:26:32 1999 David Edelsohn <edelsohn@mhpcc.edu>
* configure.in ({rs6000,powerpc}-ibm-aix*): Set float_format to none.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 478c2a0..4a393c9 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -128,6 +128,8 @@ int lr_save_eliminated;
static int return_used_this_function;
+static int after_arm_reorg = 0;
+
static int arm_constant_limit = 3;
/* For an explanation of these variables, see final_prescan_insn below. */
@@ -604,8 +606,15 @@ arm_split_constant (code, mode, val, target, source, subtargets)
|| (GET_CODE (target) == REG && GET_CODE (source) == REG
&& REGNO (target) != REGNO (source)))
{
- if (arm_gen_constant (code, mode, val, target, source, 1, 0)
- > arm_constant_limit + (code != SET))
+ /* After arm_reorg has been called, we can't fix up expensive
+ constants by pushing them into memory so we must synthesise
+ them in-line, regardless of the cost. This is only likely to
+ be more costly on chips that have load delay slots and we are
+ compiling without running the scheduler (so no splitting
+ occurred before the final instruction emission. */
+ if (! after_arm_reorg
+ && (arm_gen_constant (code, mode, val, target, source, 1, 0)
+ > arm_constant_limit + (code != SET)))
{
if (code == SET)
{
@@ -4022,6 +4031,8 @@ arm_reorg (first)
insn = scan;
}
}
+
+ after_arm_reorg = 1;
}
@@ -5378,7 +5389,9 @@ output_func_epilogue (f, frame_size)
epilogue_done:
+ /* Reset the ARM-specific per-function variables. */
current_function_anonymous_args = 0;
+ after_arm_reorg = 0;
}
static void